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International Journal of Electrical and Computer Engineering
ISSN : 20888708     EISSN : 27222578     DOI : -
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
Articles 67 Documents
Search results for , issue "Vol 7, No 4: August 2017" : 67 Documents clear
Modeling, Simulation, and Optimal Control for Two-Wheeled Self-Balancing Robot Modestus Oliver Asali; Ferry Hadary; Bomo Wibowo Sanjaya
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (30.704 KB) | DOI: 10.11591/ijece.v7i4.pp2008-2017

Abstract

Two-wheeled self-balancing robot is a popular model in control system experiments which is more widely known as inverted pendulum and cart model. This is a multi-input and multi-output system which is theoretical and has been applied in many systems in daily use. Anyway, most research just focus on balancing this model through try-on experiments or by using simple form of mathematical model. There were still few researches that focus on complete mathematic modeling and designing a mathematical model based controller for such system. This paper analyzed mathematical model of the system. Then, the authors successfully applied a Linear Quadratic Regulator (LQR) controller for this system. This controller was tested with different case of system condition. Controlling results was proved to work well and tested on different case of system condition through simulation on matlab/Simulink program.
Impact of multiple channels on the Characteristics of Rectangular GAA MOSFET Mohammed Khaouani; Ahlam Guen-Bouazza
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (459.934 KB) | DOI: 10.11591/ijece.v7i4.pp1899-1905

Abstract

Square gate all around MOSFETs are a very promising device structures allowing to continue scaling due to their superior control over the short channel effects. In this work a numerical study of a square structure with single channel is compared to a structure with 4 channels in order to highlight the impact of channels number on the device’s DC parameters (drain current and threshold voltage). Our single channel rectangular GAA MOSFET showed reasonable ratio Ion/Ioff of 104, while our four channels GAA MOSFET showed a value of 103. In addition, a low value of drain induced barrier lowering (DIBL) of 60mV/V was obtained for our single channel GAA and a lower value of with 40mv/v has been obtained for our four channel one. Also, an extrinsic transconductance of 88ms/µm have been obtained for our four channels GAA compared to the single channel that is equal to 7ms/µm.
A New Methodology for Active Power Transmission Loss Allocation in Deregulated Power System Prakash Kumar Hota; Atulya Prasad Naik
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (639.982 KB) | DOI: 10.11591/ijece.v7i4.pp1725-1737

Abstract

This paper presents a new method for transmission loss allocation in a deregulated power system. As the power loss is a nonlinear quantity, so to allocate the loss in a common transmission corrider is a difficult task. It allocates transmission losses to loads based on the actual power flow in the lossy lines due to the concerned load. Each lossy line is subdivided into as many sub-lines as corresponding to the numbers of load attached to it. The tracing of power flow through each sub-line is worked out by using proportional sharing method. The power loss in each lossy line is equal with the total loss due to all the sub-lines under it. Then by using Pro-rata for each lossy line, the individual loss for each sub-line is formulated. As the application of Pro-rata is limited to an individual line of the system, so the error in calculation is minimized. The total loss allocated to a particular load is the sum of losses occurred in each lossy lines through which the power is flowing to the concerned load. As this method is based on the actual flow of power in the transmission line corresponding to the concerned load, hence, the loss allocation made by the method gives proper and justifiable allocations to the different loads which are attached to the system. The proposed method is applied to a six-bus system and finds the mismatch in the commonly used methods. Then, it is applied to higher bus systems in which more accurate results are obtained compared to the other methods.
Functional Verification of Large-integers Circuits using a Cosimulation-based Approach Nejmeddine Alimi; Younes Lahbib; Mohsen Machhout; Rached Tourki
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (693.874 KB) | DOI: 10.11591/ijece.v7i4.pp2192-2205

Abstract

Cryptography and computational algebra designs are complex systems based on modular arithmetic and build on multi-level modules where bit-width is generally larger than 64-bit. Because of their particularity, such designs pose a real challenge for verification, in part because large-integer’s functions are not supported in actual hardware description languages (HDLs), therefore limiting the HDL testbench utility. In another hand, high-level verification approach proved its efficiency in the last decade over HDL testbench technique by raising the latter at a higher abstraction level. In this work, we propose a high-level platform to verify such designs, by leveraging the capabilities of a popular tool (Matlab/Simulink) to meet the requirements of a cycle accurate verification without bit-size restrictions and in multi-level inside the design architecture. The proposed high-level platform is augmented by an assertion-based verification to complete the verification coverage. The platform experimental results of the testcase provided good evidence of its performance and re-usability.
Energy-Efficient Hybrid K-Means Algorithm for Clustered Wireless Sensor Networks Aziz Mahboub; Mounir Arioua; El Mokhtar En-Naimi
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (437.507 KB) | DOI: 10.11591/ijece.v7i4.pp2054-2060

Abstract

Energy efficiency is the most critical challenge in wireless sensor network. The transmission energy is the most consuming task in sensor nodes, specifically in large distances. Clustered routing techniques are efficient approaches used to lower the transmission energy and maximize the network’s lifetime. In this paper, a hybrid clustered routing approach is proposed for energy optimization in WSN. This approach is based on K-Means clustering algorithm and LEACH protocol. The simulation results using MATLAB tool have shown that the proposed hybrid approach outperforms LEACH protocol and optimizes the nodes energy and the network lifetime.
Unimodal Multi-Feature Fusion and one-dimensional Hidden Markov Models for Low-Resolution Face Recognition Othmane El Meslouhi; Zineb Elgarrai; Mustapha Kardouchi; Hakim Allali
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (706.615 KB) | DOI: 10.11591/ijece.v7i4.pp1915-1922

Abstract

The objective of low-resolution face recognition is to identify faces from small size or poor quality images with varying pose, illumination, expression, etc. In this work, we propose a robust low face recognition technique based on one-dimensional Hidden Markov Models. Features of each facial image are extracted using three steps: firstly, both Gabor filters and Histogram of Oriented Gradients (HOG) descriptor are calculated. Secondly, the size of these features is reduced using the Linear Discriminant Analysis (LDA) method in order to remove redundant information. Finally, the reduced features are combined using Canonical Correlation Analysis (CCA) method. Unlike existing techniques using HMMs, in which authors consider each state to represent one facial region (eyes, nose, mouth, etc), the proposed system employs 1D-HMMs without any prior knowledge about the localization of interest regions in the facial image. Performance of the proposed method will be measured using the AR database.
Comparison of Instantaneous Reactive and Notch Filter Algorithms Seven Level Parallel Active Filter Farouk Hadj Benali; Fouad Azzouz
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (811.29 KB) | DOI: 10.11591/ijece.v7i4.pp1779-1788

Abstract

This work focused on the association of a seven level Neutral Point Clamped inverter and a parallel active filter. In order to test the efficiency of the 7 level parallel active filter, two reference current generating algorithms are used. The instantaneous reactive power algorithm and the notch filter algorithm. In this study, the instantaneous reactive power method and the notch filter method are presented. Than a section which gives a recall of the NPC multilevel inverter and PWM strategy. A comparison between the two reference current generating algorithms is made. The subjects of comparison are the total harmonic distortion (THD) and the fundamental value of the source current. The obtained simulation results have proved that the instantaneous reactive power technique is better than the notch filter technique. Simulations are carried out by PSIM program.
Rule Optimization of Fuzzy Inference System Sugeno using Evolution Strategy for Electricity Consumption Forecasting Gayatri Dwi Santika; Wayan Firdaus Mahmudy; Agus Naba
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (849.029 KB) | DOI: 10.11591/ijece.v7i4.pp2241-2252

Abstract

The need for accurate load forecasts will increase in the future because of the dramatic changes occurring in the electricity consumption. Sugeno fuzzy inference system (FIS) can be used for short-term load forecasting. However, challenges in the electrical load forecasting are the data used the data trend. Therefore, it is difficult to develop appropriate fuzzy rules for Sugeno FIS. This paper proposes Evolution Strategy method to determine appropriate rules for Sugeno FIS that have minimum forecasting error. Root Mean Square Error (RMSE) is used to evaluate the goodness of the forecasting result. The numerical experiments show the effectiveness of the proposed optimized Sugeno FIS for several test-case problems. The optimized Sugeno FIS produce lower RMSE comparable to those achieved by other well-known method in the literature.
Source based Security Issues in WDM Systems A. Antwiwaa; A. Kumar; A. K Jaiswal
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (386.194 KB) | DOI: 10.11591/ijece.v7i4.pp2101-2108

Abstract

The issue of security has become a bigger heddle for all telecommunication companies to climb in this era where information hungry customers are increasing daily. Unauthorized users are finding novel ways of accessing information of others and thereby attacking the requisite legitimate users’ information accounting to security threats. In this work, two forms of WDM system attacks will be considered. These attacks include a clone source based attack where the adversary tries to replicate the transmitted signal of the legitimate user by transmitting at the same wavelength and power and the different wavelength source based attack where the adversary transmit at a wavelength different from that of the legitimate user thereby creating interaction effects igniting security issues. Finally, a simulation of the outcome will be considered and the resulting output will be analyzed
Indian Monuments Classification using Support Vector Machine Malay S. Bhatt; Tejas P. Patalia
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (732.957 KB) | DOI: 10.11591/ijece.v7i4.pp1952-1963

Abstract

Recently, Content-Based Image Retrieval is a widely popular and efficient searching and indexing approach used by knowledge seekers. Use of images by e-commerce sites, by product and by service industries is not new nowadays. Travel and tourism are the largest service industries in India. Every year people visit tourist places and upload pictures of their visit on social networking sites or share via the mobile device with friends and relatives. Classification of the monuments is helpful to hoteliers for the development of a new hotel with state of the art amenities, to travel service providers, to restaurant owners, to government agencies for security, etc.. The proposed system had extracted features and classified the Indian monuments visited by the tourists based on the linear Support Vector Machine (SVM). The proposed system was divided into 3 main phases: preprocessing, feature vector creation and classification. The extracted features are based on Local Binary Pattern, Histogram, Co-occurrence Matrix and Canny Edge Detection methods.  Once the feature vector had been constructed, classification was   performed using Linear SVM. The Database of 10 popular Indian monuments was generated with 50 images for each class. The proposed system is implemented in MATLAB and achieves very high accuracy. The proposed system was also tested on other popular benchmark databases.

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