International Journal of Power Electronics and Drive Systems (IJPEDS)
International Journal of Power Electronics and Drive Systems (IJPEDS, ISSN: 2088-8694, a SCOPUS indexed Journal) is the official publication of the Institute of Advanced Engineering and Science (IAES). The scope of the journal includes all issues in the field of Power Electronics and drive systems. Included are techniques for advanced power semiconductor devices, control in power electronics, low and high power converters (inverters, converters, controlled and uncontrolled rectifiers), Control algorithms and techniques applied to power electronics, electromagnetic and thermal performance of electronic power converters and inverters, power quality and utility applications, renewable energy, electric machines, modelling, simulation, analysis, design and implementations of the application of power circuit components (power semiconductors, inductors, high frequency transformers, capacitors), EMI/EMC considerations, power devices and components, sensors, integration and packaging, induction motor drives, synchronous motor drives, permanent magnet motor drives, switched reluctance motor and synchronous reluctance motor drives, ASDs (adjustable speed drives), multi-phase machines and converters, applications in motor drives, electric vehicles, wind energy systems, solar, battery chargers, UPS and hybrid systems and other applications.
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<![CDATA[Real-time current sensor fault detection and localization in DFIG wind turbine systems ]]>
<![CDATA[Touioui, Hamza]]>;
<![CDATA[Ganouche, Abderahmane]]>;
<![CDATA[Ahmida, Zahir]]>;
<![CDATA[Bouzekri, Hacene]]>;
<![CDATA[Tachi, Fouad]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp2388-2397
<![CDATA[The degree of reliability is one of the main issues in having the uninterrupted operation of fault-tolerant measurement and control systems. This paper presents a technique for detecting and localizing current sensor fault in doubly fed induction generator wind turbine systems (DFIG-WT). For this purpose, a methodology divided into three steps has been carried out and is presented as follows: the first step is the application of the zero-sequence component as an indicator of the presence of the sensor fault. The second step is based on the application of Concordia transformation on the current signals to generate different criteria for localizing the faulty sensor. Finally, an artificial neural network model is developed to analyze the localization criteria and identify the faulty sensor. All simulations are carried out in MATLAB/Simulink environment. Results show that the proposed technique is effective and can be used in real-time fault detection and localization in the DFIG-WT.]]>
<![CDATA[Design and simulation of a TTRH-EV supervisory controller for a proton SAGA 1.3 ]]>
<![CDATA[Anbaran, Sajjad Abdollahzadeh]]>;
<![CDATA[Idris, Nik Rumzi Nik]]>;
<![CDATA[Aziz, Mohd Junaidi Abdul]]>;
<![CDATA[Sutikno, Tole]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp1995-2009
<![CDATA[This paper presents modeling and control design steps towards the vehicle hybridization process. The objectives are: a) to model a retrofitted proton SAGA, which is a through-the-road HEV; and b) to design and implement a supervisory control unit for this vehicle. The electric powertrain components required for conversion are sized using the ADVISOR software package. Physical models of both powertrains were modeled using the MATLAB Simscape toolbox and validated for their fidelity. A supervisory controller design and implementation for retrofitted TTRH-EV SAGA is based on the BSFC map and OOL of the engine. The control objective is to restrict engine operation within its optimum window. The controller was implemented using the MATLAB Stateflow toolbox. The complete model of the retrofitted TTRH-EV SAGA, together with the supervisory controller, was tested using standard drive cycles, and the results are presented.]]>
<![CDATA[An experimental investigation design of a bidirectional DC-DC buck-boost converter for PV battery charger system ]]>
<![CDATA[Benlahbib, Boualam]]>;
<![CDATA[Dahbi, Abedeljalil]]>;
<![CDATA[Fares, Bennaceur]]>;
<![CDATA[Lakhdari, Abelkader]]>;
<![CDATA[Bouarroudj, Noureddine]]>;
<![CDATA[Mekhilef, Saad]]>;
<![CDATA[Abdelkrim, Thameur]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp2362-2371
<![CDATA[The aim of this paper is to present a bidirectional DC-DC buck-boost converter design that is specifically intended for use with storage batteries in a PV system. The primary purpose of the batteries is to mitigate the unpredictable and intermittent nature of renewable energy sources. To achieve this, a DC-DC converter is used in buck mode during daylight hours to charge the batteries with power derived from the PV system. If the photovoltaic energy source is unavailable, the batteries can discharge to power the DC load through the converter in boost mode. Therefore, the bi-directional DC/DC converter, which has a high-power capacity, manages the power storage system. To this end, the paper describes the design and implementation of both the power circuit board and drive circuit board of the buck-boost converter, taking into account the rated current, voltage, and power. Finally, the effectiveness and efficiency of the designed converter are verified through experimental tests carried out in both charge and discharge modes, with results demonstrating the validity and efficiency of the converter.]]>
<![CDATA[Assessing annual energy production using a combination of lidar and mast measurement campaigns ]]>
<![CDATA[Mkhaitari, Rachid]]>;
<![CDATA[Mir, Yamina]]>;
<![CDATA[Zazoui, Mimoun]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp2398-2408
<![CDATA[The current study evaluates the wind potential at early stage of wind project using met mast and lidar. The wind data obtained from a met mast located away from the turbines can be hindered by obstacles, leading to limited coverage and height, it negatively impacting the project's performances. To address the above limitations, the study suggests implementing a secondary measurement approach utilizing Lidars in various locations to cover the full study area. This work assesses the two measurements campaign and compares the wind potential evaluated with data measured by met mast and lidars. The simulations of two wind data base are quantified referring to the main key performance indicators for a project of total capacity of 140MW. The results show significant improvement in gross and net production for all exceedance scenarios, with 2% increase on the P90, and an improvement in the annual capacity factor by 1.09%. The use of Lidar data referenced to a met mast leads to accurate and bankable data, with the advances of cost and logistics, Lidars helps in layout configuration and performance evaluation.]]>
<![CDATA[A low power and high speed 45 nm CMOS dynamic comparator with low offset ]]>
<![CDATA[Brindha, Kulothungan]]>;
<![CDATA[Manjula, Jothilingam]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp2293-2300
<![CDATA[The development of efficient data converters necessitates the design of low-power and high-speed comparators with low offset. Data converters, such as analog to digital converters (ADCs) and digital to analog converters (DACs), are critical components in applications like wireless communication, multimedia, and sensor interfaces. To enhance the performance of these data converters, improving the speed and power efficiency of comparators becomes crucial. Designing dynamic comparators with low power consumption and high-speed capabilities greatly enhances the sampling rate and accuracy of data converters. Moreover, addressing the offset voltage of comparators becomes crucial for achieving accurate signal conversion. To fulfill this need, a novel dynamic comparator has been designed, featuring high-speed operation, low-power consumption, and minimal offset. The circuit comprises a pre-amplifier with a charge pump, followed by a decision circuit and an output stage. Through simulations, the comparator has demonstrated low power consumption of 15.04 µW, a delay of 80.51 ps, and an extremely low offset voltage of 8 µV. These characteristics make it highly suitable for data converters. The comparator operates at a clock frequency of 1 GHz and a supply voltage of 1 V, and the simulation was conducted using the Cadence Virtuoso tool in a 45 nm CMOS technology.]]>
<![CDATA[Novel complementary Sziklai pair based high gain low noise small-signal amplifiers ]]>
<![CDATA[Shukla, SachchidaNand]]>;
<![CDATA[Arshad, Syed Shamroz]]>;
<![CDATA[Srivastava, Geetika]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp2283-2292
<![CDATA[A new paired configuration of opposite polarity BJTs, the “complementary Sziklai pair” is introduced in the series of multi-BJT-based devices like Darlington and Sziklai pair, and its viability is tested in small-signal common emitter (CE) and common collector (CC) amplifier configurations. The Darlington and Sziklai both face the problem of poor frequency response at a higher frequency which is addressed by the proposed configuration. The proposed pair with CE amplifier holds class-A amplification property with a high voltage gain of 200.05, a high current gain of 11.62, wider bandwidth of 1.64 MHz, and a low THD of 1.29E-6%, hence supports the potential of wide applicability in analog communication. Similarly, the proposed pair with CC configuration produces approximately a unit current gain of 0.99 with wider bandwidth of 1.90 MHz and low THD of 1.76E-6%, therefore it can be used as a current buffer in a generalized current follower circuit. Conclusively, the device structure of this new BJT pair may be considered the third consecutive member of the series of Darlington pair and Sziklai pair. The layout of the proposed CE and CC amplifier occupy small areas of 158.30 μm2 (10.23×15.47 μm) and 141.16 μm2 (10.20×13.84 μm) respectively in 180 nm process technology.]]>
<![CDATA[Design of the transmitter coil used in wireless power transfer system based on genetic algorithm ]]>
<![CDATA[Konghirun, Mongkol]]>;
<![CDATA[Nutwong, Supapong]]>;
<![CDATA[Sangswang, Anawach]]>;
<![CDATA[Hatchavanich, Nattapong]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp2307-2318
<![CDATA[Performance of the wireless power transfer (WPT) system relies on the physical dimensions of the coupled coil, which should be optimally designed to meet required system performance and reduce the operating cost. This paper presents an optimal design based on genetic algorithm (GA) for the transmitter coil used in wireless power transfer system. Physical parameters of the circular flat spiral coil, including wire’s cross-sectional area, coil’s inner diameter, coil’s outer diameter, coil’s turn number, and space between each turn of the coil are considered. The design objective is to minimize the total wire length required by the coil subjected to both linear and nonlinear constraints. The design process is implemented on MATLAB optimization toolbox which is simple and accurate. The validity of proposed optimal coil design is verified by the experiment, which indicates that total wire length of the optimized coil can be reduced by 5.5 percent compared to the conventional coil without sacrificing the system performance. System efficiency obtained from the optimized coil can be improved up to 8.32 percent.]]>
<![CDATA[Controlling the significance of BLDC motor internal faults using dual examine algorithm in electric vehicle applications ]]>
<![CDATA[Gaurav, Gaurav]]>;
<![CDATA[Nakka, Jayaram]]>;
<![CDATA[Obulesu, Dakka]]>;
<![CDATA[Arandhakar, Sairaj]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp1946-1954
<![CDATA[This paper presents dual examine algorithm (DEA) to reduce residual error as well as to provide accurate phase currents without any distortion for a closed loop brushless direct current (BLDC) motor of an electric vehicle (EV). The underlying technology of DEA is a hybrid of the tabu search optimization (TSO) method and the genetic algorithm (GA). During closed loop operation of BLDC motor residual error is introduced by the discrepancy between the actual and reference speed, and the phase current distortion lowers the efficiency of the machine as a result machine performance is degraded. To address these issues, GA algorithm calculates the necessary parameters for the controller to produce precise current without distortion based on stator phase currents, and the suggested TSO algorithm limits the repeated operations in the PID controller to reduce the residual error to the greatest degree feasible. After primary examining, dual examine process initiate the transposing operation such as TSO is used to prove and calculate the phase current controller parameters, and GA is used to correct for remaining inaccuracy. To validate the proposed DEA algorithm is compared with advanced particle swarm optimization (APSO). The results verified the superiority of proposed DEA algorithm using MATLAB/Simulink platform.]]>
<![CDATA[Modified instantaneous power theory control of dynamic voltage restorer powered by photovoltaic system ]]>
<![CDATA[Asiri, Yousef]]>;
<![CDATA[Al-Gahtani, Saad F.]]>;
<![CDATA[Irshad, Shaik Mohammad]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp2418-2432
<![CDATA[Power quality issues have become widespread due to nonlinear electronic converters and loads. Nonlinear components in the power system hamper the power quality, network efficiency and voltage regulation. The power quality issues like sag, swell, and voltage unbalance can be reduced by employing a dynamic voltage restorer (DVR). DVR provides the compensating power from a DC source to minimize the effect of sag, swell, and voltage unbalance. This article presents a power system with DVR using a photovoltaic system (PV) as a DC source instead of a conventional battery source. This article proposes a modified instantaneous power (PQ) control technique to generate the reference signal of load voltage to assure the DVR's superior performance. This modified technique uses an anti-aliasing filter to generate a reference signal. This proposed technique is tested under extreme power quality issues of 80% sag, 20% sag, 120% swell, 170% swell, and voltage unbalance. The DVR is modeled and simulated using MATLAB/Simulink. A comparison is made between the traditional and modified PQ methods from the obtained results. The analyzed results under severe power quality issues suggest that the proposed P-Q control technique is a preferable option for the DVR with PV as a DC power supply.]]>
<![CDATA[FOPID controlled PV based QBC fed gamma Z-source inverter applicable for pump operations in an induction motor drive ]]>
<![CDATA[Selvaraj, Krishnan]]>;
<![CDATA[David, Anbarasi Jebaselvi Gnanaiah]]>;
<![CDATA[Sathi, Rama Reddy]]>;
<![CDATA[Kuppusamy, Pradeepa]]>
<![CDATA[ International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023 ]]>
Publisher : <![CDATA[Institute of Advanced Engineering and Science ]]>
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DOI: 10.11591/ijpeds.v14.i4.pp1955-1964
<![CDATA[A closed loop current mode-fractional-order-PID (CM-FOPID) controlled and PV based quadratic-boost-converter (QBC) fed gamma Z-Source Inverter with Induction motor system (PV-QBC-GZSI-IMS) for pump operation is proposed here. This work recommends a combination of QBC with gamma Z-source-inverter between the DC link source and asynchronous motor system. This will reduce the voltage rating of PV panel and its initial cost. GZSI reduces the current spikes in stator current. The objective of this research work is to regulate the speed of PV-QBC-GZSI-IMS. This effort deals with the closed loop response of PV-QBC-GZSI-IMS accompanied by current-mode-proportional integral (CM-PI) and CM-FOPID controllers. The performance investigations are analyzed with the control of QBC fed Gamma Z-source inverter with motor load using CM-PI and CM-FOPID controllers and the detailed comparison has been presented. MATLAB/Simulink outputs obtained with their respective speed and torque characteristics in time domain have been depicted. The closed loop CM-FOPID control of PV-QBC-GZSI-IMS is superior to the closed loop CM-PI control of PV-QBC-GZSI-IMS. The proposed QBC-converter reduces the voltage rating of PV panel and GZSI reduces current spikes in motor. The novelty of the article is to enhance the dynamic response of PV-QBC-GZSI-IMS using FOPID. The steady state error in torque is reduced to 0.52 N-m using FOPID.]]>
