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International Journal of Reconfigurable and Embedded Systems (IJRES)
Published by Institute of Advanced Engineering and Science
ISSN : 20894864     EISSN : 27222608     DOI : -
Core Subject : Economy,
Economics, Econometrics & Finance
The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems, ranging from audio-video-equipment, telephones, vehicles, toys, aircraft, medical diagnostics, pacemakers, climate control systems, manufacturing systems, intelligent power systems, security systems, to weapons etc. The aim of IJRES is to provide a vehicle for academics, industrial professionals, educators and policy makers working in the field to contribute and disseminate innovative and important new work on reconfigurable and embedded systems. The scope of the IJRES addresses the state of the art of all aspects of reconfigurable and embedded computing systems with emphasis on algorithms, circuits, systems, models, compilers, architectures, tools, design methodologies, test and applications.
Arjuna Subject : -
Articles 26 Documents
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Search results for , issue "Vol 13, No 1: March 2024" : 26 Documents clear
Efficient very large-scale integration architecture design of proportionate-type least mean square adaptive filters Lakshmaiah, Gangadharaiah Soralamavu; Narayanappa, Chikkajala Krishnappa; Shrinivasan, Lakshmi; Narasimhaiah, Divya Muddenahalli
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp69-75

Abstract

The effectiveness of adaptive filters are mainly dependent on the design techniques and the algorithm of adaptation. The most common adaptation technique used is least mean square (LMS) due its computational simplicity. The application depends on the adaptive filter configuration used and are well known for system identification and real time applications. In this work, a modified delayed μ-law proportionate normalized least mean square (DMPNLMS) algorithm has been proposed. It is the improvised version of the µ-law proportionate normalized least mean square (MPNLMS) algorithm. The algorithm is realized using Ladner-Fischer type of parallel prefix logarithmic adder to reduce the silicon area. The simulation and implementation of very large-scale integration (VLSI) architecture are done using MATLAB, Vivado suite and complementary metal–oxide– semiconductor (CMOS) 90 nm technology node using Cadence register transfer level (RTL) Genus Compiler respectively. The DMPNLMS method exhibits a reduction in mean square error, a higher rate of convergence, and more stability. The synthesis results demonstrate that it is area and delay effective, making it practical for applications where a faster operating speed is required.
Design of fault tolerant algorithm for network on chip router using field programmable gate array Shahane, Priti; Kurup, Rakhi
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp1-8

Abstract

Many internet protocol (IP) modules are present in contemporary system on chips (SoCs). This could provide an issue with interconnection among different IP modules, which would limit the system's ability to scale. Traditional bus-based SoC architectures have a connectivity bottleneck, and network on chip (NoC) has evolved as an embedded switching network to address this issue. The interconnections between various cores or IP modules on a chip have a significant impact on communication and chip performance in terms of power, area latency and throughput. Also, designing a reliable fault tolerant NoC became a significant concern. In fault tolerant NoC it becomes critical to identify faulty node and dynamically reroute the packets keeping minimum latency. This study provides an insight into a domain of NoC, with intention of understanding fault tolerant approach based on the XY routing algorithm for 4×4 mesh architecture. The fault tolerant NoC design is synthesized on Field programmable gate array (FPGA).
Role of tuning techniques in advancing the performance of negative capacitance field effecting based full adder Daniel, Ravuri; Prasad, Bode; Chaturvedi, Abhay; Balaswamy, Chinthaguntla; Sudarsa, Dorababu; Vinodhkumar, Nallathambi; Eamani, Ramakrishna Reddy; Sudhakar, Ambarapu; Rajanna, Bodapati Venkata
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp59-68

Abstract

The increasing demand for faster, robust, and efficient device development of enabling technology to mass production of industrial research in circuit design deals with challenges like size, efficiency, power, and scalability. This paper, presents a design and analysis of low power high speed full adder using negative capacitance field effecting transistors. A comprehensive study is performed with adiabatic logic and reversable logic. The performance of full adder is studied with metal oxide field effect transistor (MOSFET) and negative capacitance field effecting (NCFET). The NCFET based full adder offers a low power and high speed compared with conventional MOSFET. The complete design and analysis are performed using cadence virtuoso. The adiabatic logic offering low delay of 0.023 ns and reversable logic is offering low power of 7.19 mw.
Machine learning classifiers for fall detection leveraging LoRa communication network Reddy, I. V. Subba; Lavanya, P.; Selvakumar, V.
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp76-84

Abstract

Today, health monitoring relies heavily on technological advancements. This study proposes a low-power wide-area network (LPWAN) based, multinodal health monitoring system to monitor vital physiological data. The suggested system consists of two nodes, an indoor node, and an outdoor node, and the nodes communicate via long range (LoRa) transceivers. Outdoor nodes use an MPU6050 module, heart rate, oxygen pulse, temperature, and skin resistance sensors and transmit sensed values to the indoor node. We transferred the data received by the master node to the cloud using the Adafruit cloud service. The system can operate with a coverage of 4.5 km, where the optimal distance between outdoor sensor nodes and the indoor master node is 4 km. To further predict fall detection, various machine learning classification techniques have been applied. Upon comparing various classifier techniques, the decision tree method achieved an accuracy of 0.99864 with a training and testing ratio of 70:30. By developing accurate prediction models, we can identify high-risk individuals and implement preventative measures to reduce the likelihood of a fall occurring. Remote monitoring of the health and physical status of elderly people has proven to be the most beneficial application of this technology.
FPGAs memory synchronization and performance evaluation using the open computing language framework Almomany, Abedalmuhdi; Jarrah, Amin
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp33-40

Abstract

One advantage of the open computing language (OpenCL) software framework is its ability to run on different architectures. Field programmable gate arrays (FPGAs) are a high-speed computing architecture used for computation acceleration. This work develops a set of eight benchmarks (memory synchronization functions, explained in this study) using an OpenCL framework to study the effect of memory access time on overall performance when targeting the general FPGA computing platform. The results indicate the best synchronization mechanism to be adopted to synthesize the proposed design on the FPGA computation architecture. The proposed research results also demonstrate the effectiveness of using a task-parallel model approach to avoid using high-cost synchronization mechanisms within proposed designs that are constructed on the general FPGA computation platform.
Hyperelliptic curve based authentication for the internet of drones Gnanaraj, Aloy Anuja Mary; Abbasali, Farithkhan; Kumar, Aanandha Saravanan; Subramanian, Sathyasri Bala; Chinnathambi, Murugan
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp133-142

Abstract

Drones provide an alternative progression in protection submissions since they are capable of conducting autonomous seismic investigations. Recent advancement in unmanned aerial vehicle (UAV) communication is an internet of a drone combined with 5G networks. Because of the quick utilization of rapidly progressed registering frameworks besides 5G officialdoms, the information from the user is consistently refreshed and pooled. Thus, safety or confidentiality is vital among clients, and a proficient substantiation methodology utilizing a vigorous sanctuary key. Conventional procedures ensure a few restrictions however taking care of the assault arrangements in information transmission over the internet of drones (IOD) environmental frameworks. A unique hyper elliptical curve (HEC) cryptographically based validation system is proposed to provide protected data facilities among drones. The proposed method has been compared with the existing methods in terms of packet loss rate, computational cost, and delay and thereby provides better insight into efficient and secure communication. Finally, the simulation results show that our strategy is efficient in both computation and communication.
Remote surveillance of enclosed and open architectures using unmanned vehicle with advanced security Khetan, Ayushman; Sarkar, Abhirup; Sabunwala, Hussain; Gupta, Eshan; Ramachandran, Harikrishnan; Shahane, Priti
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp126-132

Abstract

Monitoring behavior, numerous actions, or any such information is considered as surveillance and is done for information gathering, influencing, managing, or directing purposes. Citizens employ surveillance to safeguard their communities. Governments do this for the purposes of intelligence collection, including espionage, crime prevention, the defense of a method, a person, a group, or an item; or the investigation of criminal activity. Using an internet of things (IoT) rover, the area will be secured with better secrecy and efficiency instead of humans, will provide an additional safety step. In this paper, there is a discussion about an IoT rover for remote surveillance based around a Raspberry Pi microprocessor which will be able to monitor a closed/open space. This rover will allow safer survey operations and would help to reduce the risks involved with it.
Telugu letters dataset and parallel deep convolutional neural network with a SGD optimizer model for TCR Phaniram, Josyula Siva; Reddy, Mukkamalla Babu
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp217-226

Abstract

Because of the rapid growth in technology breakthroughs, including multimedia and cell phones, Telugu character recognition (TCR) has recently become a popular study area. It is still necessary to construct automated and intelligent online TCR models, even if many studies have focused on offline TCR models. The Telugu character dataset construction and validation using an Inception and ResNet-based model are presented. The collection of 645 letters in the dataset includes 18 Achus, 38 Hallus, 35 Othulu, 34×16 Guninthamulu, and 10 Ankelu. The proposed technique aims to efficiently recognize and identify distinctive Telugu characters online. This model's main pre-processing steps to achieve its goals include normalization, smoothing, and interpolation. Improved recognition performance can be attained by using stochastic gradient descent (SGD) to optimize the model's hyperparameters.
Radio frequency identification based materials tracking system for construction industry Jain, Sameer; Sanchez, Gustavo; Sunil, Taruna; Sharma, Dinesh Kumar
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp85-95

Abstract

The construction industry is an industry that is always surrounded by uncertainties and risks. The industry is always associated with a threatindustry which has a complex, tedious layout and techniques characterized by unpredictable circumstances. It comprises a variety of human talents and the coordination of different areas and activities associated with it. In this competitive era of the construction industry, delays and cost overruns of the project are often common in every project and the causes of that are also common. One of the problems which we are trying to cater to is the improper handling of materials at the construction site. In this paper, we propose developing a system that is capable of tracking construction material on site that would benefit the contractor and client for better control over inventory on-site and to minimize loss of material that occurs due to theft and misplacing of materials.
Design of access control framework for big data as a service platform Sharma, Santosh Kumar; Pratap, Ajay; Dev, Harsh
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 13, No 1: March 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v13.i1.pp151-159

Abstract

Big data as a service (BDaaS) platform is widely used by various organizations for handling and processing the high volume of data generated from different internet of things (IoT) devices. Data generated from these IoT devices are kept in the form of big data with the help of cloud computing technology. Researchers are putting efforts into providing a more secure and protected access environment for the data available on the cloud. In order to create a safe, distributed, and decentralised environment in the cloud, blockchain technology has emerged as a useful tool. In this research paper, we have proposed a system that uses blockchain technology as a tool to regulate data access that is provided by BDaaS platforms. We are securing the access policy of data by using a modified form of ciphertext policy-attribute based encryption (CP-ABE) technique with the help of blockchain technology. For secure data access in BDaaS, algorithms have been created using a mix of CP-ABE with blockchain technology. Proposed smart contract algorithms are implemented using Eclipse 7.0 IDE and the cloud environment has been simulated on CloudSim tool. Results of key generation time, encryption time, and decryption time has been calculated and compared with access control mechanism without blockchain technology.

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