cover
Contact Name
I Gde Dharma Nugraha
Contact Email
i.gde@ui.ac.id
Phone
+6281558805505
Journal Mail Official
ijecbe@ui.ac.id
Editorial Address
IJECBE Secretariat Electrical Engineering Department, Faculty of Engineering, Universitas Indonesia Kampus UI Depok, West Java, Indonesia 16424
Location
Kota depok,
Jawa barat
INDONESIA
International Journal of Electrical, Computer, and Biomedical Engineering (IJECBE)
Published by Universitas Indonesia
ISSN : -     EISSN : 30265258     DOI : https://doi.org/10.62146/ijecbe.v2i1
The International Journal of Electrical, Computer, and Biomedical Engineering (IJECBE) is an international journal that is the bridge for publishing research results in electrical, computer, and biomedical engineering. The journal is published bi-annually by the Electrical Engineering Department, Faculty of Engineering, Universitas Indonesia. All papers will be blind-reviewed. Accepted papers will be available online (free access) The journal publishes original papers which cover but is not limited to Electronics and Nanoelectronicsc Nanoelectronics and nanophotonic devices; Nano and microelectromechanical systems (NEMS/MEMS); Nanomaterials; Quantum information and computation; Electronics circuits, systems on chips, RF electronics, and RFID; Imaging and sensing technologies; Innovative teaching and learning mechanism in nanotechnology education; Nanotechnologies for medical applications. Electrical Engineering Antennas, microwave, terahertz wave, photonics systems, and free-space optical communications; Broadband communications: RF wireless and fiber optics; Telecommunication Engineering; Power and energy, power electronics, renewable energy source, and system; Intelligent Robotics, autonomous vehicles systems, and advanced control systems; Computational Engineering. Computer Engineering Architecture, Compiler Optimization, and Embedded Systems; Networks, Distributed Systems, and Security; High-performance Computing; Human-Computer Interaction (HCI); Robotics and Artificial Intelligence; Software Engineering and Programming Language; Signal and Image Processing. Biomedical Engineering Cell and Tissue Engineering; Biomaterial; Biomedical Instrumentation; Medical Imaging.
Articles 93 Documents
Delivery-Aware Hybrid Throughput Forecasting for Targeted Capacity Planning and Proactive Congestion Avoidance in Microwave Transmission Networks Gede Deny Marthafani Gede; Catur Apriono
International Journal of Electrical, Computer, and Biomedical Engineering Vol. 4 No. 1 (2026)
Publisher : Universitas Indonesia

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.62146/ijecbe.v4i1.239

Abstract

Microwave transmission networks operate under strict physical-layer capacity constraints, where excessive utilization may reduce service reliability and increase congestion risk. In practical operations, capacity expansion decisions are both time-sensitive and location-sensitive, requiring operators to determine not only when an upgrade should be executed, but also which links require intervention. However, many existing forecasting approaches remain focused on numerical prediction accuracy and do not explicitly support delivery-aware and targeted planning decisions. This study proposes a delivery-aware hybrid smoothing–residual forecasting framework for link-level microwave throughput prediction using hourly Network Management System (NMS) data from 110 links observed over a six-month period. The framework separates the throughput series into a smoothed structural component and a residual component, where primary forecasting is performed on the structural signal, and residual error is modeled using LightGBM. The final forecast is reconstructed by combining both components and evaluated across multiple horizons using WMAPE, MAE, and RMSE. Experimental results show that CatBoost with LightGBM residual correction provides the most consistent performance across all forecasting horizons. Beyond improving prediction accuracy, the proposed framework enables delivery-aware and targeted capacity planning by estimating threshold-crossing timing and identifying high-risk links. This supports proactive congestion avoidance, more efficient upgrade prioritization, and improved resource allocation in microwave transmission networks.
A Hybrid Endpoint-Network Correlation Framework for Ransomware-Oriented Analysis Clavincy Francis Yohanes Ngantung; I Gde Dharma Nugraha
International Journal of Electrical, Computer, and Biomedical Engineering Vol. 4 No. 1 (2026)
Publisher : Universitas Indonesia

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.62146/ijecbe.v4i1.243

Abstract

Ransomware-oriented incidents often leave suspicious traces across both endpoint and network domains, yet these observations are still commonly examined in isolation. This makes incident interpretation difficult, since host-level and communication-level evidence may remain fragmented even when they originate from the same attack sequences. To address this problem, this paper presents a hybrid endpoint-network correlation framework built around three analytical stages: endpoint-side suspicious activity analysis, network-side suspicious activity analysis, and multi-log correlation. The framework combines rule-based indicators with machine-learning-based suspiciousness support to preserve relevant evidence and then links the resulting candidates through temporal proximity, entity consistency, and behavioral relevance. Experiments on public attack scenarios show that the framework retained 16 endpoint candidates and 3 network candidates in a successful Drupal exploitation case, 11 endpoint candidates and 3 network candidates in a Samba known-creds scenario, and preserved a network-only context in a reconnaissance-dominant case. These retained candidates then serve as the basis for identifying cross-log relations, allowing suspicious observations from different sources to be interpreted within the same incident context. These results suggest that the framework can construct incident-oriented context without forcing unsupported cross-source relations.
Implementation and Hardware-Level Validation of a 36 V BLDC Motor Drive Using Artix-7 FPGA Rafi Kamil Arief; Fajar Rahino Triputra; Arief Udhiarto
International Journal of Electrical, Computer, and Biomedical Engineering Vol. 4 No. 1 (2026)
Publisher : Universitas Indonesia

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.62146/ijecbe.v4i1.244

Abstract

This paper presents an Artix-7 FPGA-based implementation and validation of a 36 V BLDC motor drive for open-loop no-load operation. The proposed controller combines Hall-sensor sixstep commutation, counter-based PWM generation, bidirectional phase sequencing, and deadtime-protected gate output logic in programmable hardware. The study emphasizes hardwarelevel validation, including the consistency of Hall-sector decoding, PWM scaling, and inverter output behavior, rather than closed-loop speed regulation. The design was verified using Verilog simulation and experimentally tested with a three-phase inverter, a 20 kHz PWM carrier, and a 10 - bit duty cycle. The measurements confirmed the expected PWM-driven phase, low-side return path, and floating phase behavior for adjacent Hall states. No-load characterization was then performed in both clockwise and counterclockwise directions. The measured speed increased almost linearly with duty cycle and reached approximately 2425 r/min at full duty cycle, while the supply current increased to about 0.49 A. The minimum start duty was 2% in both directions, and the minimum sustain duty was 1.8% and 1.7% for clockwise and counterclockwise rotation, respectively.

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