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Contact Name
Nizirwan Anwar
Contact Email
nizirwan.anwar@esaunggul.ac.id
Phone
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telkomnika@ee.uad.ac.id
Editorial Address
Ahmad Yani st. (Southern Ring Road), Tamanan, Banguntapan, Bantul, Yogyakarta 55191, Indonesia
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Daerah istimewa yogyakarta
INDONESIA
TELKOMNIKA (Telecommunication Computing Electronics and Control)
ISSN : 16936930     EISSN : 23029293     DOI : 10.12928
Core Subject : Science,
Submitted papers are evaluated by anonymous referees by single blind peer review for contribution, originality, relevance, and presentation. The Editor shall inform you of the results of the review as soon as possible, hopefully in 10 weeks. Please notice that because of the great number of submissions that TELKOMNIKA has received during the last few months the duration of the review process can be up to 14 weeks. Communication Engineering, Computer Network and System Engineering, Computer Science and Information System, Machine Learning, AI and Soft Computing, Signal, Image and Video Processing, Electronics Engineering, Electrical Power Engineering, Power Electronics and Drives, Instrumentation and Control Engineering, Internet of Things (IoT)
Articles 2,614 Documents
A Portable Insole Pressure Mapping System Kian Sek Tee; Yogindra Syam Hari Javahar; Hashim Saim; Wan Nurshazwani Wan Zakaria; Safinaz Binti Mohd Khialdin; Hazlita Isa; M. I. Awad; Chin Fhong Soon
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 15, No 4: December 2017
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v15i4.7227

Abstract

The human locomotion is studied through gait analysis and is best observed instrumentally rather than observing visually. Thus, a portable insole pressure mapping system is built to assist in studying the human gait cycle. The pressure distribution is determined by instrumentally mapping the insole using force sensitive resistive sensors that are connected to Arduino UNO via cables. The values are saved into a secure digital card that could be post processed. Hardware and software design phase are executed for the development of this project. The outcomes match to the knowledge of human gait definitions in static posture and normal walking.
Simultaneous Electrochemical Measurement using Paper Fluidic Channel on CMOS Chip Jun Eguchi; Katsuyuki Yamaoka; Shigeyasu Uno
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 15, No 2: June 2017
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v15i2.6131

Abstract

This paper described the new system of biosensing using CMOS chip. The system was expected to be used in various circumstances because it was suitable for miniaturization compared to the conventional system. To conduct electrochemical measurements, the new system used paper fluidic channel set on the CMOS chip to transport solution to the on-chip electrodes. The materials of paper fluidic channel were only paper and silicone resin, and these were biocompatible. In experiment, we carried out simultaneous detection of glucose and ethanol in liquid sample solutions on the 5mm square CMOS chip and paper fluidic channel. Furthermore, this system can detect various target molecules in addition to glucose and ethanol, and increase number of simultaneous measurement by adding some more process to the paper and CMOS chip. 
Performance improvement of fractional N-PLL synthesizers for digital communication applications Nour Zaid Naktal; A. Z. Yonis; Khalid Khalil Mohammed
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 19, No 6: December 2021
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v19i6.21929

Abstract

Loop filter with two order was designed to improve the performance of the fractional N-phase locked loop (PLL) circuit (reference spurs noise and switching time), decreasing these two factors give good characteristic to fractional N-PLL circuit, the second order and third order loop filters are widely used in frequency synthesizer because they give good stability tolerance and for their simple architecture. They are designed at bandwidth B=125 KHz and its multipoles, at two values of the phase margin (pm)= 35°, 57°. MATLAB program was used to find the lock time, the component values for each element in the loop filter, also the filter impedance T(s), the bode plot of frequency response for close loop (CL) and open loop gain (OL). It is found by comparing the result of the frequency response for the 2nd order loop filter and 3rd order loop filter, that increasing the order of the filter will reduce the spurs noise that destroy the received signal at receiving side.
Analysis of UAV multicopter of air photography in New Yogyakarta International Airports Indreswari Suroso; Erwhin Irmawan
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 17, No 1: February 2019
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v17i1.9255

Abstract

The higher the quality of the drone, the longer the drone will fly and the better the quality of the drone's photography. Survey of research location in Glagah Indah Beach, preparation of drone at ground, we plan the height of flying drones, then testing drone at ground, we measure camera calibration, and then result capture in the air and images in the air. Vehicle specifications are as follows: Frame: F450; Flight Controller: DJI Naza M-Lite; Propeller: 1045 Prop; motorbike: brushless sunnsky 980 kVa; ESC: Skywalker 40 Ampere 3s; Battery: Ace 3s Gens 5000mAH; Remote: Turnigy 9XR with Frsky Tanseiver; and camera: Xiaomi Yi 4k International edition.This drone type multicopter can penetrate the high of 100 meters to 200 meters and can air for 30 minutes, can take an area of up to 1 km while payload drones multicopter is 2.8 kg.This multicopter drone has a 12 megapixel sensor; maximum flight time of 15 minutes; speed of 20 m/s, maximum take-up speed of 6 m/s, maximum landing speed of 4m/s, temperature range when operating drone 0o to 40oC and maximum image size of 4000x3000.
Design Concept of Dynamic-Adaptive Reconfigurable Wireless Sensor Node (DARWiSeN) C. Bambang Dwi Kuncoro; M. Anda Falahuddin
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 12, No 3: September 2014
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v12i3.98

Abstract

This paper describe the proposed design concept of wireless sensor node named Dynamic-Adaptive Reconfigurable Wireless Sensor Node (DARWiSeN), with special emphasis on the design principles and functionality. The design concept is targeted to a wireless sensor node prototype that has ability to adapt various applications and situation with a minimal redesign effort through concept of reconfigurable hardware and modularity approach. Both the hardware and software components are detailed, together with experimental evaluation. The experimental evaluation revealed that this approach is not only capable to show rapid prototype of wireless sensor application design, but it can also be used as a generic wireless node platform design in dynamic-adaptive reconfigurable feature, flexible, and greatly extending its applicability.
Measurement and Evaluation of Tx/ Rx Antennas for X-Band Radar System Folin Oktafiani; Yuyu Wahyu; Yusuf Nur Wijayanto
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 14, No 2: June 2016
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v14i2.3291

Abstract

This paper presents the performance evaluation of antennas for microwave transmission and reception in X-band radar systems. The transmitter (Tx) and receiver (Rx) antennas are fabricated on microstrip array structures. The antennas are connected to microwave circuits with transmission lines, coaxial cables, and microwave combiners and splitters. The designed antennas in X-band microwave operation for Tx and Rx parts were fabricated identically by 4x64 microstrip patch antennasin an array structure. The fabricated antennas were measured for return loss (S11), VSWR, radiation pattern, and Gain. The detail methods for the measurements are reported and their results are also discussed. The measured antenna gain of ~20dBi, and beam-width of ~20degreecan be obtained using the fabricated antennas at 9.4GHz microwave operation.
FPGA-based Digital Baseband Transmission System Performance Tester Research and Design Huimin Duan; Juanjuan Gu; Guohua Hu; Qian Zhang
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 15, No 1: March 2017
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v15i1.3161

Abstract

Communication System Transmission Performance Tester, as a digital communication system design and testing equipment, plays an important role in the construction and daily maintenance of the communication system. The paper presents a kind of tester, which is designed using Cyclone IV FPGA (Field Programmable Gata Array) and VHDL (Very High Speed Integrated Circuits Hardware Description Language). According to the features in the eye diagram, the system performance can intuitively and qualitatively evaluated. The results prove that the system accurately displayed the eye diagram, thereby reflected the performance of the baseband transmission system truthfully
FPGA Implementation of Low-Area Square Root Calculator Aiman Zakwan Jidin; Tole Sutikno
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 13, No 4: December 2015
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v13i4.1894

Abstract

Square root is one of the mathematical operations which are widely used in digital signal processing. Its implementation on hardware such as FPGA will provide several advantages compare to the performance offered in software. There are several algorithms which can be utilized for this calculation, but they are difficult to be implemented in FPGA. This paper presents a model of FPGA based square root calculator, which requires very low resources usage, thus occupying very low area of FPGA. The model is designed to suit the needs of medium-speed and low-speed applications which don’t need very high processing speed, while optimizing the number of resources utilized.The modified non-restoring algorithm is used in this design to compute the square root. The design is coded in RTL VHDL, and implemented in Altera DE2-board for hardware validation. The implementation produced very precise square root calculation, with low latency computation and low area consumption, for various input data width tested.
Certificateless Signature Scheme Based on Rabin Algorithm and Discrete Logarithm Xiangjun Xin; Chaoyang Li
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 14, No 1: March 2016
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v14i1.2919

Abstract

Certificateless signature can effectively immue the key escrow problem in the identity-based signature scheme. But the security of the most certificateless signatures usually depends on only one mathematical hard problem, which makes the signature vulnerable when the underlying hard problem has been broken. In order to strengthen the security, in this paper, a certificateless signature whose security depends on two mathematical hard problems, discrete logarithm and factoring problems, is proposed. Then, the proposed certificateless signature can be proved secure in the random oracle, and only both of the two mathematical hard problems are solved, can the proposed signature be broken. As a consequence, the proposed certificateless signature is more secure than the previous signatures. On the other hand, with the pre-computation of the exponential modular computation, it will save more time in the signature signing phase. And compared with the other schemes of this kind, the proposed scheme is more efficient.
Google+ vs Facebook: The Comparison Kevin Curran; Scott Morrison; Stephen Mc Cauley
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 10, No 2: June 2012
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v10i2.814

Abstract

Social networks are a varyingly popular tool used to connect with friends, colleagues and/or family. Recently, Facebook has been at the top of the social network food chain, with Bebo and MySpace decreasing in users and the huge increase of users joining Facebook in such a short time. Google have just recently launched Google+, a social networking site. This is not the first time that Google have attempted to break into the social networking scene but it is possible that these failed attempts may have taught them something. As Facebook’s user base is extremely diverse, spreading across different countries, races, ages, professions, and interests, to name a few, this network is a good model to compare new rival Google+ to. Google+ has set out to do the same things as Facebook but better to try and steal away some of that high power and necessity that Facebook has gained. Facebook has News feed, Google has Stream. Facebook has Lists, Google has circles. Facebook has like’s, Google has +1. Facebook accounts for 10% of overall internet usage. This paper will look at various comparables between the two social networks and analyse the better functionality, design and ease of use. It will then conclude a verdict on which is the better social network to use overall. 

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