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All Journal TELKOMNIKA (Telecommunication Computing Electronics and Control) Bulletin of Electrical Engineering and Informatics
Abid Reda El Wardi
Ibn Tofail University
Computer Science & IT Electrical & Electronics Engineering

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High-efficiency rectifier achieves 63% power conversion in low start-up voltage for UHF RFID tags in 180 nm CMOS technology Zahra Sahel; Sanae Habibi; Abdelhak Bendali; Abid Reda El Wardi; Karima Benkhadda; Samia Zarrik; Hayat El Abassi; Fatehi ALtalqi; Omar Mouhib; Mohamed Habibi
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 22, No 6: December 2024
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v22i6.25996

Abstract

This paper presents an N-metal-oxide semiconductor (NMOS) rectifier designed for efficient radio frequency (RF) energy harvesting and wireless power transmission in passive ultra-high frequency (UHF) radio frequency identification (RFID) applications. The rectifier’s efficiency is improved through an innovative diode with a new block connection, reducing the threshold voltage compared to conventional diode transistors. This enhancement significantly boosts output voltage and efficiency. A seven-stage configuration, based on the proposed diode and optimized via a superposition method, has been evaluated for its ability to increase DC output voltage and power conversion efficiency (PCE), particularly at low RF input power levels. Simulations show a PCE of 63% at 900 MHz with an RF input of -11 dBm, delivering 1.610 V across a 0.518 MΩ load. Notably, the rectifier maintains a PCE above 30% across a wide input power range from -32 dBm to -5 dBm, overcoming a key challenge of maintaining efficiency under low input power conditions. The circuit architecture was implemented using standard 180 nm TSMC CMOS technology, showcasing its practical applicability in RFID systems.
Design and implementation of a cryptographic algorithm based on the AES advanced encryption standard for UHF RFID systems Sanae Habibi; Zahra Sahel; Abdelhak Bendali; Abid Reda El Wardi; Samia Zarrik; Mouad El Kobbi; Nazha Cherkaoui; Abdelkader Hadjoudja
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 22, No 3: June 2024
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v22i3.25520

Abstract

In this paper, a proposal is made for a cryptographic algorithm designed for passive ultra-high-frequency (UHF) radio frequency identification systems. The algorithm relies on the advanced encryption standard (AES) as its fundamental encryption technique, augmented by two supplementary steps: the initial step involves generating a random key and the second is the randomization of data, this introduces an extra level of security to encryption process against attacks. The developed architecture has been optimized to minimize hardware resource consumption with faster execution speed. The algorithm has been simulated, synthesized and implemented in an xtreme digital signal processing (DSP) starter kit equipped with xilinx’s spartan-3A DSP 1800A edition and it serves the purpose of encrypting and decrypting user data on a radio frequency identification (RFID) passive tag. The main objective is to make it difficult to break the algorithm because of its multiple steps. The experimental results showed that the speed, functionality and cost of encryption and decryption make this a perfectly practical solution, providing a satisfactory level of security for today’s communications systems, or other electronic data transfer processes where security is required.
Design and simulation of a high-efficiency class F power amplifier for 5G wireless energy transmission Mouad El Kobbi; Abdelhak Bendali; Samia Zarrik; Sanae Habibi; Abid Reda El Wardi; Mohamed Habibi; Abdelkader Hadjoudja
Bulletin of Electrical Engineering and Informatics Vol 15, No 5: October 2026
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/eei.v15i5.10883

Abstract

This paper presents the design and optimization of a high-efficiency class F power amplifier (PA) for 5G communication systems. The proposed design focuses on achieving optimal efficiency, output power Pout, and stability through precise harmonic control and waveform shaping. Using advanced simulation techniques, the PA achieves a power-added efficiency (PAE) of 80%, a Pout of 40.73 dBm, and a gain of 20 dB over a 120 MHz bandwidth centered at 3.5 GHz. Stability is ensured with a stability factor of 1.5 and a stability measure of 0.8 across the operating band. The first three harmonics are effectively managed to enhance efficiency, with the drain current (IDS) shaped into a square waveform and the drain voltage (VDS) into a quasi-sinusoidal waveform. These results demonstrate the capability of the proposed class F PA to meet stringent 5G requirements, offering high performance, strong stability, and efficient operation for sub-6 GHz applications.
Co-Authors Abdelhak Bendali Abdelkader Hadjoudja Abdelkader Hadjoudja Fatehi ALtalqi Hayat El Abassi Karima Benkhadda Mohamed Habibi Mouad El Kobbi Mouad El Kobbi Nazha Cherkaoui Omar Mouhib Samia Zarrik Samia Zarrik Sanae Habibi Zahra Sahel