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An on-chip soft-start pseudo-current hysteresis-controlled buck converter for automotive applications Boutaghlaline, Anas; El Khadiri, Karim; Tahiri, Ahmed
International Journal of Electrical and Computer Engineering (IJECE) Vol 14, No 2: April 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v14i2.pp1459-1472

Abstract

This paper introduces a novel direct current to direct current (DC-DC) buck converter that uses a pseudo-current hysteresis controller and an on-chip soft start circuit for improved transient performance in automotive applications. The proposed converter, implemented with Taiwan semiconductor manufacturing company (TSMC) 0.18 µm complementary metal oxide semiconductor (CMOS) one-poly-six-metal (1P6M) technology, includes a rail-to-rail current detection circuit and an on-chip soft start circuit to handle transient responses and improve efficiency. Transient response analysis shows fast settling times of 28 µs for both load current changes from 100 mA to 1 A and reversals with consistent transient voltages of approximately 190 mV and peak power efficiency of 99.32% at 5 V output voltage and 100 mA load current. Additionally, the converter maintains a constant output voltage of approximately 5 V across the entire load current range with an average accuracy of 90.41%. A comparative analysis with previous work shows superior performance in terms of figure of merit (FOM). Overall, the proposed pseudo-current hysteresis controlled buck converter exhibits remarkable transient response, load regulation and power efficiency, positioning it as a promising solution for demanding applications, particularly in automotive systems where precise voltage regulation is crucial.
A 1.8 V, 10 mA low dropout voltage regulator for IoT application in 90 nm CMOS technology EL Mouzouade, Said; EL Khadiri, Karim; Tahiri, Ahmed
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v14.i4.pp2301-2306

Abstract

A complementary metal-oxide-semiconductor CMOS low dropout voltage regulator (LDO) design flow using 90 nm CMOS technology is described and simulated in this paper. The circuit consists of an analogue LDO with using PMOS pass device, an error amplifier, a bandgap voltage, a biasing circuit, a feedback resistive network sized to have the desired closed loop gain. This LDO was designed to maintain stable voltage at 1.8 V and 10 mA of current output in low resistive load. The LDO regulator achieves 105 uA quiescent current, -47 PSRR@13 KHz noise frequency. The final design occupies approximately 0.05 mm2. The results were satisfying and make the designed circuit suitable for IoT application.
The 1.5 bit-per-stage 10-bit pipelined CMOS A/D converter for CMOS image sensor Menssouri, Aicha; El Khadiri, Karim; Tahiri, Ahmed
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v14.i4.pp2273-2282

Abstract

This paper presents a 1.5-bit/stage pipeline analog-to-digital converters (ADC) with a 100 MHz operating frequency for CMOS image sensors built using TSMC 90nm CMOS technology. The design features a novel architecture including a comparator, CMOS transmission gates, a sub-ADC logic circuit, bootstrap switches, and a gain-boosted fully differential telescopic op-amp based switched-capacitor MDAC. The ADC operates on a 1.8 V power supply, with a typical power dissipation of 1.632 mW, and a full-scale input signal voltage of 0.8 V. At 100 MHz sampling frequency, it achieves a maximum ENOB of 12.42 bits, an SNR of 76.53 dB, and a FOM of 0.297 pJ/conversion step. This 1.5-bit/stage pipeline ADC is well-suited for CMOS image sensors.
A Li-ion battery charger based on LDO regulator with pre-charge mode in 180 nm CMOS technology Ouremchi, Mounir; El Khadiri, Karim; Qjidaa, Hassan; Jamil, Mohammed Ouazzani
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 15, No 2: June 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v15.i2.pp659-669

Abstract

This paper presents a novel Li-Ion battery charger that utilizes a low-dropout (LDO) regulator and incorporates four control modes: low constant current mode, pre-charge current mode, fast constant current mode, and constant voltage mode. The charger aims to meet specific criteria such as high precision, high efficiency, and small form factor. Through simulation results, the following specifications were obtained using a 1.8 V supply in a 0.18 μm complementary metal–oxide–semiconductor (CMOS) technology: a trickle current of 124.7 mA, a pre-charge current of 466.94 mA, a maximum charge current of 1.06 A, and a charge voltage of 4.21 V. The proposed charger demonstrates an efficiency of 92%.
Biopotential multi-path current feedback instrumentation amplifier with automatic offset cancellation loop for resistive bridge microsensors Laababid, Younes; El Khadiri, Karim; Tahiri, Ahmed
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v14.i4.pp2107-2118

Abstract

This study introduces a refined current feedback instrumentation amplifier (CFIA) specifically designed for amplifying biopotential signals that originate from resistive-bridge sensors. The proposed architecture uniquely incorporates a multipath chopper-stabilized CFIA which has been developed to minimize the effects of bridge offsets, while maintaining low power usage, high input impedance, and reduced noise characteristics. The engineering blueprint employs a ripple reduction loop (RRL) to mitigate output ripple caused by chopper up-modulation. To speed up offset cancellation and to limit the offset caused by bridge mismatch, an automatic offset cancellation loop (AOCL) circuit is integrated within the analog front end (AFE). Crafted using a conventional 0.18 µm CMOS process, the CFIA in this design provides adjustable gain between 20.35 dB to 55.14 dB, with a power supply rejection ratio (PSRR) and a common mode rejection ratio (CMRR) of 103 dB and 114 dB, respectively. The system demonstrates an input-referred noise (IRN) value of 16 ηV/√Hz at 200 Hz frequency, equivalent to a noise efficiency factor (NEF) of 5.18. Operating from a supply voltage of 1.8V, the AFE shows a power consumption of 291 μW.
Switching regulator based on an adaptive DC-DC buck converter for a lithium-ion battery charging interface Rahali, Ahmed; El Khadiri, Karim; Qjidaa, Hassan; Tahiri, Ahmed
IAES International Journal of Robotics and Automation (IJRA) Vol 13, No 3: September 2024
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijra.v13i3.pp351-360

Abstract

A switching regulator based on an adaptive DC-DC buck converter for a Li-ion battery charging interface is introduced in this paper with the aim of improving the efficiency of charging the Li-ion battery during the whole charging process. By using the battery voltage as feedback, an adaptive reference is generated. This reference is employed by the converter, which is in continuous conduction mode (CCM), to produce a wide adaptive output voltage that closely tracks the battery voltage, intended to serve as the power source for the multimode charging interface. The converter was implemented in a 180 nm complementary metal oxide semiconductor (CMOS) process and simulated using the Cadence Virtuoso tool. With an input voltage of 5 V and a switching frequency selected at 500 kHz, the simulation results show that the converter produces different charging currents for each battery charging mode, and an adaptive output voltage ranging from 2.8 V to 4.38 V, with the current ripple of 38 mA in CC mode and voltage ripple factor less than 1% in constant voltage (CV) mode. The average converter efficiency is 83.5%.
An improved transient performance boost converter using pseudo-current hysteresis control Boutaghlaline, Anas; El Khadiri, Karim; Tahiri, Ahmed
Bulletin of Electrical Engineering and Informatics Vol 12, No 6: December 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/eei.v12i6.5835

Abstract

This paper introduces an enhanced low transient voltage and fast transient response boost converter. It uses a hysteresis-controlled circuit fed by a voltage signal from a rail-to-rail current sensor, resulting in improved efficiency, and transient response. The converter is designed using Taiwan semiconductor manufacturing company (TSMC) 0.18 µm CMOS 1P6M technology, delivers an output voltage of 1.8 V while operating with an input voltage range of 0.5 V to 1 V and supports an output load current range of 10 to 100 mA. The key contributions of this paper are: i) introducing a new boost converter architecture employing pseudo-current hysteresis-controlled (PCHC) techniques, ii) incorporating voltage and current loops into the proposed architecture, and iii) demonstrating superior transient performance. Experimental measurements reveal a peak power efficiency of 98.6% at 10 mA and transient times of 15.4 µs and 11.8 µs for a step load change from 10 to 100 mA and back to 10 mA, respectively, with transient voltages of 51 mV. The presented boost converter outperforms in terms of performance, compared to previous works using the figure of merit (FOM) formula.
High-efficiency multimode charging interface for Li-Ion battery with renewable energy sources in 180 nm CMOS Mamouni, Hajjar; El Khadiri, Karim; El Affar, Anass; Jamil, Mohammed Ouazzani; Qjidaa, Hassan
Indonesian Journal of Electrical Engineering and Computer Science Vol 38, No 2: May 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v38.i2.pp744-754

Abstract

The high-efficiency multi-source Lithium-Ion battery charger with multiple renewable energy sources described in the present paper is based on supply voltage management and a variable current source. The goal of charging the battery in a constant current (CC) mode and controlling the supply voltage of the charging circuit are both made achievable using a variable current source, which may improve the battery charger’s energy efficiency. The battery must be charged with a degraded current by switching from the CC state for the constant voltage (CV) state to prevent harming the Li-Ion battery. The Cadence Virtuoso simulator was utilized to obtain simulation results for the charging circuit, which is constructed in 0.18 μm CMOS technology. The simulation results obtained using the Cadence Virtuoso simulator, provide a holding current trickle charge (TC) of approximately 250 mA, a maximum charging current (LC) of approximately 1.3 A and a maximum battery voltage of 4.2 V, and takes only 29 minutes to charge.