Yousif Atalla
University Malaysia Pahang (UMP)

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Temperature characteristics of FinFET based on channel fin width and working voltage Yousif Atalla; Yasir Hashim; Abdul Nasir Abd. Ghafar; Waheb A. Jabbar
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 6: December 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (693.526 KB) | DOI: 10.11591/ijece.v10i6.pp5650-5657

Abstract

This paper shows the temperature sensitivity of FinFET and the possibility of using FinFET as a temperature Nano sensor based on Fin width of transistor. The multi-gate field effect transistor (MuGFET) simulation tool is used to examine the temperature effect on FinFET characteristics. Current-voltage characteristics with various temperatures and channel Fin width (WF= 5,10,20,40 and 80 nm) are at first simulated, the diode mode connection has been used in this study. The best temperature sensitivity of the FinFET is has been considered under the biggest ∆I at the working voltage VDD with range of 0–5 V. According to the results, the temperature sensitivity increased linearly with all the range of channel Fin width (5-80 nm), also, the lower gate Fin width (WF=5nm) with higher sensitivity can achieved with lower working voltage (VDD=1.25 V).
A temperature characterization of (Si-FinFET) based on channel oxide thickness Yousif Atalla; Yasir Hashim; Abdul Nasir Abd Ghafar; Waheb A. Jabbar
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 17, No 5: October 2019
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v17i5.11798

Abstract

This paper presents the temperature-gate oxide thickness characteristics of a fin field-effect transistor (FinFET) and discusses the possibility of using such a transistor as a temperature nano-sensor. The investigation of channel oxide thickness–based temperature characteristics is useful to optimized electrical and temperature characteristics of FinFET. Current–voltage characteristics with different temperatures and gate oxide thickness values (Tox = 1, 2, 3, 4, and 5 nm) are initially simulated, and the diode mode connection is considered to measure FinFET’s temperature sensitivity. Finding the best temperature sensitivity of FinFET is based on the largest change in current (∆I) within a working voltage range of 0–5 V. According to the results, the temperature sensitivity of FinFET increases linearly with oxide thickness within the range of 1–5 nm, furthermore, the threshold voltage and drain-induced barrier lowering increase with increasing oxide thickness. Also, the subthreshold swing (SS) is close to the ideal value at the minimum oxide thickness (1 nm) then increases and diverges with increasing oxide thickness. So, the best oxide thickness (nearest SS value to the ideal one) of FinFET under the conditions described in this research is 1 nm.