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All Journal International Journal of Electrical and Computer Engineering TELKOMNIKA (Telecommunication Computing Electronics and Control)
Yasir Hashim
Ishik University
Computer Science & IT Electrical & Electronics Engineering

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Effects of downscaling channel dimensions on electrical characteristics of InAs-FinFET transistor Ahmed Mahmood; Waheb A. Jabbar; Yasir Hashim; Hadi Bin Manap
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 4: August 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (781.718 KB) | DOI: 10.11591/ijece.v9i4.pp2902-2909

Abstract

In this paper, we present the impact of downscaling of nano-channel dimensions of Indium Arsenide Fin Feld Effect Transistor (InAs- FinFET) on electrical characteristics of the transistor, in particular; (i) ION/IOFF ratio, (ii) Subthreshold Swing (SS), Threshold voltage (VT), and Drain-induced barrier lowering (DIBL). MuGFET simulation tool was utilized to simulate and compare the considered characteristics based on variable channel dimensions: length, width and oxide thickness. The results demonstrate that the best performance of InAs- FinFET was achieved with channel length = 25 nm, width= 5 nm, and oxide thickness between 1.5 to 2.5 nm according to the selected scaling factor (K = 0.125).
Characterization of silicon nanowire transistor Hani Taha Al Ariqi; Waheb A. Jabbar; Yasir Hashim; Hadi Bin Manap
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 17, No 6: December 2019
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v17i6.13084

Abstract

This paper analyses the temperature sensitivity of Silicon Nanowire Transistor (SiNWT) depends on the diameter (D.ch) of channel. In addition, it also investigates the possibility of utilizing SiNWT as a Nano- temperature sensor. The MuGFET simulation tool has been utilized to conduct a comprehensive simulation to evaluate both electrical and temperature characteristics of SiNWT. Current-voltage characteristics with different values of temperature and with a varying diameter of the Nano wire channel (D.ch = 80, 40, 20 and 10 nm), were simulated. Diode operating mode connection of the transistor is suggested for measuring the temperature sensitivity of SiNWT. As simulation results demonstrated, the best temperature sensitivity was occurred at lower temperature with increasing the channel diameter. We also illustrate the impact of varying temperature and channel diameter on electrical characteristics of SiNWT including, Subthreshold Swing (SS), Threshold voltage (V.th), and Drain-induced barrier lowering (DIBL), which were proportionally increased with the operating temperature.
A temperature characterization of (Si-FinFET) based on channel oxide thickness Yousif Atalla; Yasir Hashim; Abdul Nasir Abd Ghafar; Waheb A. Jabbar
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 17, No 5: October 2019
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v17i5.11798

Abstract

This paper presents the temperature-gate oxide thickness characteristics of a fin field-effect transistor (FinFET) and discusses the possibility of using such a transistor as a temperature nano-sensor. The investigation of channel oxide thickness–based temperature characteristics is useful to optimized electrical and temperature characteristics of FinFET. Current–voltage characteristics with different temperatures and gate oxide thickness values (Tox = 1, 2, 3, 4, and 5 nm) are initially simulated, and the diode mode connection is considered to measure FinFET’s temperature sensitivity. Finding the best temperature sensitivity of FinFET is based on the largest change in current (∆I) within a working voltage range of 0–5 V. According to the results, the temperature sensitivity of FinFET increases linearly with oxide thickness within the range of 1–5 nm, furthermore, the threshold voltage and drain-induced barrier lowering increase with increasing oxide thickness. Also, the subthreshold swing (SS) is close to the ideal value at the minimum oxide thickness (1 nm) then increases and diverges with increasing oxide thickness. So, the best oxide thickness (nearest SS value to the ideal one) of FinFET under the conditions described in this research is 1 nm.
Co-Authors Abdul Nasir Abd Ghafar Ahmed Mahmood Hadi Bin Manap Hani Taha Al Ariqi Waheb A. Jabbar Waheb A. Jabbar Yousif Atalla