Aiman Zakwan Jidin
Universiti Teknikal Malaysia Melaka

Published : 13 Documents Claim Missing Document
Claim Missing Document
Check
Articles

Found 4 Documents
Search
Journal : International Journal of Electrical and Computer Engineering

Flood disaster indicator of water level monitoring system Wan Haszerila Wan Hassan; Aiman Zakwan Jidin; Siti Asma Che Aziz; Norain Rahim
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (443.374 KB) | DOI: 10.11591/ijece.v9i3.pp1694-1699

Abstract

The early warning systems for flood management have been developed rapidly with the growth of technologies. These system help to alert people early with the used of Short Message Service (SMS) via Global System for Mobile Communications (GSM). This paper presents a simple, portable and low cost of early warning system using Arduino board, which is used to control the whole system and GSM shields to send the data. System has been designed and implemented based on two components which is hardware and software. The model determines the water level using float switch sensors, then it analyzes the collected data and determine the type of danger present. The detected level is translated into an alert message and sent to the user. The GSM network is used to connect the overall system units via SMS.
Low-cost and portable automatic sheet cutter Mohd Syafiq Mispan; Ahmad Hafizzudin Mustafa; Hafez Sarkawi; Aiman Zakwan Jidin
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 5: October 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1837.368 KB) | DOI: 10.11591/ijece.v10i5.pp5139-5146

Abstract

Process automation is crucial to increase productivity, more efficient use of materials, better product quality, improved safety, etc. In small-medium enterprise (SME) businesses related to household retailing, one of the process automation needed is the measurement and cutting of the mat or sheet, made of rubber or polyvinyl chloride (PVC) materials. Most of the household retailers that selling the sheet, the process of measuring and cutting according to the customer’s requirements are manually performed using a measuring tape and scissors. These manual processes can cause inaccuracy in length, inefficient use of material, low productivity and reduce product quality. This paper presents a low cost and portable automatic sheet cutter using the Arduino development board, which is used to control the process of measuring and cutting the materials. The system uses a push-button where the user can set the required length and quantity of the sheet. Once the required information is set, the stepper motor rolls the sheet until the required length is satisfied. Subsequently, another stepper motor moves the cutter horizontally and cut the sheet. With the automatic sheet cutter, the material is cut with acceptable precision. The design of the automatic sheet cutter is low cost and portable which significantly suitable to be used by SME household retailers.
Strategies for FPGA Implementation of Non-Restoring Square Root Algorithm Tole Sutikno; Aiman Zakwan Jidin; Auzani Jidin; Nik Rumzi Nik Idris
International Journal of Electrical and Computer Engineering (IJECE) Vol 4, No 4: August 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (94.039 KB)

Abstract

This paper presents three strategies to implement non restoring square root algorithm based on FPGA. A new basic building block is called controlled subtract-multiplex (CSM) is introduced in first strategy which use gate level abstraction. The main principle of the method is similar with conventional non-restoring algorithm, but it only uses subtract operation and append 01, while add operation and append 11 is not used. Second strategy presents the first strategy in register transfer level (RTL) abstraction. In third strategy, a modification for the implementation of conventional non-restoring algorithm is presented which also use RTL abstraction. The all above strategies is implemented in VHDL programming and adopt fully pipelined architecture. The strategies have conducted to implement successfully in FPGA hardware, and each of the strategies is offer an efficient in hardware resource. In generally, the third strategy is superior.DOI:http://dx.doi.org/10.11591/ijece.v4i4.6008
Improve performance of the digital sinusoidal generator in FPGA by memory usage optimization Aiman Zakwan Jidin; Irna Nadira Mahzan; A. Shamsul Rahimi A. Subki; Wan Haszerila Wan Hassan
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (467.12 KB) | DOI: 10.11591/ijece.v9i3.pp1742-1749

Abstract

This paper presented the improvement in the performance of the digital sinusoidal signal generator, which was implemented in FPGA, by optimizing the usage of the available memory onboard. The sine wave was generated by using a Lookup Table method, where its pre-calculated values were stored in the onboard memory, and its frequency can be adjustable by changing the incremental step value of the memory address. In this proposed research, the memory stores only 25000 samples of the first quarter from a period of a sine wave and thus, the output signal accuracy was increased and the output frequency range was expanded, compared to the previous research. The proposed design was successfully developed and implemented in ALTERA Cyclone III DE0 FPGA Development Board, and its functionality was validated via functional simulation in Modelsim and also hardware experimental results observation in SignalTap II.