Article Per Year (5 Year)
p-Index From 2021 - 2026
0
P-Index
This Author published in this journals
All Journal International Journal of Electrical and Computer Engineering
Arnab Nag
SRM Institute of Science and Technology
Computer Science & IT Electrical & Electronics Engineering

Published : 1 Documents Claim Missing Document
Claim Missing Document
Check
Articles

Found 1 Documents
Search

 1 
Design and Simulation of Novel 11-level Inverter Scheme with Reduced Switches R. Palanisamy; Gaurav Singh; Priyanka Das; D. Selvabharathi; Sourav Sinha; Arnab Nag
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 5: October 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (844.633 KB) | DOI: 10.11591/ijece.v8i5.pp3536-3543

Abstract

This work recommends the performance of coupled inductor based novel 11-level inverter with reduced number of switches. The inverter which engender the sinusoidal output voltage by the use of split inductor with minimised total harmonic distortion (THD). The voltage stress on each controlled switching devices, capacitor balancing and switching losses can be reduced. The proposed system which gives better controlled output current and improved output voltage with moderate THD value. The switching devices of the system are controlled by using multicarrier sinusoidal pulse width modulation algorithm by comparing the carrier signals with sinusoidal signal. The simulation and experimental results of the proposed 11-level inverter system outputs are established using matlab/Simulink and dsPIC microcontroller respectively.
Co-Authors D. Selvabharathi Gaurav Singh Priyanka Das R. Palanisamy Sourav Sinha