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Triet Nguyen
Ho Chi Minh City University of Technology

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Efficient TCAM design based on dual port SRAM on FPGA Triet Nguyen; Kiet Ngo; Nguyen Trinh; Bao Bui; Linh Tran; Hoang Trang
Indonesian Journal of Electrical Engineering and Computer Science Vol 22, No 1: April 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v22.i1.pp104-112

Abstract

Ternary content addressable memory (TCAM) is a memory that allows high speed searching for data. Not only it is acknowledged as associative memory/storage but also TCAM can compare input searching content (key) against a collection of accumulated data and return the matching address which compatible with this input search data. SRAM-based TCAM utilizes and allocates blocks RAM to perform application of TCAM on FPGA hardware. This paper presents a design of 480×104 bit SRAM-based TCAM on altera cyclone IV FPGA. Our design achieved lookup rate over 150 millions input search data and update speed at 75 million rules per second. The architecture is configurable, allowing various performance trade-offs to be exploited for different ruleset characteristics.
Co-Authors Bao Bui Hoang Trang Kiet Ngo Linh Tran Nguyen Trinh