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International Journal of Electrical and Computer Engineering

IJECE
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Published by Institute of Advanced Engineering and Science

ISSN : 20888708 EISSN : 27222578 DOI : -

Core Subject : Science, Engineering,

Computer Science & IT Electrical & Electronics Engineering

International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.

Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)

Articles 117 Documents

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Search results for , issue "Vol 10, No 2: April 2020" : 117 Documents clear

Myanmar named entity corpus and its use in syllable-based neural named entity recognition Hsu Myat Mo; Khin Mar Soe
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

Myanmar language is a low-resource language and this is one of the main reasons why Myanmar Natural Language Processing lagged behind compared to other languages. Currently, there is no publicly available named entity corpus for Myanmar language. As part of this work, a very first manually annotated Named Entity tagged corpus for Myanmar language was developed and proposed to support the evaluation of named entity extraction. At present, our named entity corpus contains approximately 170,000 name entities and 60,000 sentences. This work also contributes the first evaluation of various deep neural network architectures on Myanmar Named Entity Recognition. Experimental results of the 10-fold cross validation revealed that syllable-based neural sequence models without additional feature engineering can give better results compared to baseline CRF model. This work also aims to discover the effectiveness of neural network approaches to textual processing for Myanmar language as well as to promote future research works on this understudied language.

The optimal synthesis of scanned linear antenna arrays Anas A. Amaireh; Asem S. Al-Zoubi; Nihad I. Dib
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

In this paper, symmetric scanned linear antenna arrays are synthesized, in order to minimize the side lobe level of the radiation pattern. The feeding current amplitudes are considered as the optimization parameters. Newly proposed optimization algorithms are presented to achieve our target; Antlion Optimization (ALO) and a new hybrid algorithm. Three different examples are illustrated in this paper; 20, 26 and 30 elements scanned linear antenna array. The obtained results prove the effectiveness and the ability of the proposed algorithms to outperform and compete other algorithms like Symbiotic Organisms Search (SOS) and Firefly Algorithm (FA).

Foreground algorithms for detection and extraction of an object in multimedia Rekha V.; Natarajan K.; Innila Rose J.
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

Background Subtraction of a foreground object in multimedia is one of the major preprocessing steps involved in many vision-based applications. The main logic for detecting moving objects from the video is difference of the current frame and a reference frame which is called “background image” and this method is known as frame differencing method. Background Subtraction is widely used for real-time motion gesture recognition to be used in gesture enabled items like vehicles or automated gadgets. It is also used in content-based video coding, traffic monitoring, object tracking, digital forensics and human-computer interaction. Now-a-days due to advent in technology it is noticed that most of the conferences, meetings and interviews are done on video calls. It’s quite obvious that a conference room like atmosphere is not always readily available at any point of time. To eradicate this issue, an efficient algorithm for foreground extraction in a multimedia on video calls is very much needed. This paper is not to just build Background Subtraction application for Mobile Platform but to optimize the existing OpenCV algorithm to work on limited resources on mobile platform without reducing the performance. In this paper, comparison of various foreground detection, extraction and feature detection algorithms are done on mobile platform using OpenCV. The set of experiments were conducted to appraise the efficiency of each algorithm over the other. The overall performances of these algorithms were compared on the basis of execution time, resolution and resources required.

The best sextic approximation of hyperbola with order twelve Abedallah Rababah; Esra’a Rababah
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

In this article, the best uniform approximation for the hyperbola of degree 6 that has approximation order 12 is found. The associated error function vanishes 12 times and equioscillates 13 times. For an arc of the hyperbola, the error is bounded by 2:4 x 10-4. We explain the details of the derivation and show how to apply the method. The method is simple and this encourages and motivates people working in CG and CAD to apply it in their works.

Development of DC voltage control from wind turbines using proportions and integrals for three-phase grid-connected inverters Arckarakit Chaithanakulwat
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

This research article presents the method to control the DC voltage of the boost converter by using a proportional-integral (PI) controller. With AC voltage from a wind turbine generator, converting to DC voltage level by rectifier, this DC voltage controlled by PI controller is to control boost converter that sends DC links to the inverter which converting alternating current voltage to direct current voltage through three-phase load and to the grid-connected system. For switching the IGBTs in the inverter, the PWM signal, on the hysteresis current control, is controlled by the signal from the detected reference voltage based on the grid-connected system and the voltage from a wind turbine generator. The tests made the comparison of results from the simulation with the MATLAB/Simulink program and result from the hardware on the prototype. The power quality results, such as harmonic, power factor, are in acceptable ranges.

Log-domain electronically-tuneable fully differential high order multi-function filter Osama O. Fares
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

This paper presents the synthesis of fully deferential circuit that is capable of performing simultaneous high-pass, low-pass, and band-pass filtering in the log domain. The circuit utilizes modified Seevinck’s integrators in the current mode. The transfer function describing the filter is first presented in the form of a canonical signal flow graph through applying Mason’s gain formula. The resulting signal flow graph consists of summing points and pick-off points associated with current mode integrators within unity-gain negative feedback loops. The summing points and the pick-off points are then synthesized as simple nodes and current mirrors, respectively. A new fully differential current-mode integrator circuit is proposed to realize the integration operation. The proposed integrator uses grounded capacitors with no resistors and can be adjusted to work as either lossless or lossy integrator via tuneable current sources. The gain and the cutoff frequency of the integrator are adjustable via biasing currents. Detailed design and simulation results of an example of a 5th order filter circuit is presented. The proposed circuit can perform simultaneously 5th order low-pass filtering, 5th order high-pass filtering, and 4th order band-pass filtering. The simulation is performed using Pspice with practical Infineon BFP649 BJT model. Simulation results show good matching with the target.

Inverse kinematic analysis of 4 DOF pick and place arm robot manipulator using fuzzy logic controller Tresna Dewi; Siti Nurmaini; Pola Risma; Yurni Oktarina; Muhammad Roriz
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

The arm robot manipulator is suitable for substituting humans working in tomato plantation to ensure tomatoes are handled efficiently. The best design for this robot is four links with robust flexibility in x, y, and z-coordinates axis. Inverse kinematics and fuzzy logic controller (FLC) application are for precise and smooth motion. Inverse kinematics designs the most efficient position and motion of the arm robot by adjusting mechanical parameters. The FLC utilizes data input from the sensors to set the right position and motion of the end-effector. The predicted parameters are compared with experimental results to show the effectiveness of the proposed design and method. The position errors (in x, y, and z-axis) are 0.1%, 0.1%, and 0.04%. The rotation errors of each robot links (θ1, θ2, and θ3) are 0%, 0.7% and 0.3%. The FLC provides the suitable angle of the servo motor (θ4) responsible in gripper motion, and the experimental results correspond to FLC’s rules-based as the input to the gripper motion system. This setup is essential to avoid excessive force or miss-placed position that can damage tomatoes. The arm robot manipulator discussed in this study is a pick and place robot to move the harvested tomatoes to a packing system.

Interference aware resource allocation model for D2D under cellular network Ruksar Fatima; Rohina Khanam; Shaik Humera Tauseef
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

Device-to-Device communication (D2D) has emerged as an efficient communication model in future generation cellular network for offloading cellular traffic and enhance overall network performance. D2D communication aid in attaining better spectrum utilization, lower delay, and less energy consumption, which can well adapt to meet demand of higher transmission rate, larger network capacity. Further, enhances spectral efficiency by reutilizing resource. However, it may result in severe cross-tier interference and co-tier interference. Therefore, efficient interference modelling design are required to address performance degradation caused by the interferences. The existing model has focused on addressing interference considering D2D association operating on same cell with the cellular association. As a result, it incurs interference to the cellular user located in the same cell. However, practically D2D association in overlapping area will reutilize spectrum of multiple neighboring cells. As a result, it incurs interference in multiple cells. For overcoming research challenges, this work presented Interference Aware Resource Allocation (IARA) model for D2D under cellular network as a game theory model. This work consider a resource allocation game where base station as a contender for catering D2D resource needs under different assumptions. Experiment are conducted to evaluate performance of IARA. The outcome shows IARA attained significant performance improvement over state-of-art models in terms of sum rate (utility), successful packet transmission, revenue, and delay.

Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FPGA processor R. Palanisamy; C. S. Boopathi; K. Selvakumar; K. Vijayakumar
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse generated using matlab.

Reinforcement learning based multi core scheduling (RLBMCS) for real time systems Dhruva R. Rinku; M. AshaRani
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

Embedded systems with multi core processors are increasingly popular because of the diversity of applications that can be run on it. In this work, a reinforcement learning based scheduling method is proposed to handle the real time tasks in multi core systems with effective CPU usage and lower response time. The priority of the tasks is varied dynamically to ensure fairness with reinforcement learning based priority assignment and Multi Core MultiLevel Feedback queue (MCMLFQ) to manage the task execution in multi core system.

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Tole Sutikno

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ijece@iaesjournal.com

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ijece@iaesjournal.com

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Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA

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Home Page

OAI Link

Editorial Team

Contact

Reviewer

Google Scholar

Contact Name Tole Sutikno

Contact Email ijece@iaesjournal.com

Phone -

Journal Mail Official ijece@iaesjournal.com

Editorial Address -

Location Kota yogyakarta, Daerah istimewa yogyakarta INDONESIA

Abstract

Abstract

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Abstract

Abstract

Contact Name
Tole Sutikno

Contact Email
ijece@iaesjournal.com

Phone
-

Journal Mail Official
ijece@iaesjournal.com

Editorial Address
-

Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA