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International Journal of Electrical and Computer Engineering

IJECE
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Published by Institute of Advanced Engineering and Science

ISSN : 20888708 EISSN : 27222578 DOI : -

Core Subject : Science, Engineering,

Computer Science & IT Electrical & Electronics Engineering

International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.

Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)

Articles 6,301 Documents

171 172 173 174 175

Test Case Reduction Using Ant Colony Optimization for Object Oriented Program Sudhir Kumar Mohapatra; Srinivas Prasad
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 6: December 2015
Publisher : Institute of Advanced Engineering and Science

Software testing is one in all the vital stages of system development. In software development, developers continually depend upon testing to reveal bugs. Within the maintenance stage test suite size grow due to integration of new functionalities. Addition of latest technique force to make new test case which increase the cost of test suite. In regression testing new test case could also be added to the test suite throughout the entire testing process. These additions of test cases produce risk of presence of redundant test cases. Because of limitation of time and resource, reduction techniques should be accustomed determine and take away. Analysis shows that a set of the test case in a suit should satisfy all the test objectives that is named as representative set. Redundant test case increase the execution price of the test suite, in spite of NP-completeness of the problem there are few sensible reduction techniques are available. During this paper the previous GA primarily based technique proposed is improved to search out cost optimum representative set using ant colony optimization.

A new design algorithm for hybrid active power filter Chau Minh Thuyen
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 6: December 2019
Publisher : Institute of Advanced Engineering and Science

The correct determination of the parameters of Hybrid Active Power Filter (HAPF) plays a decisive role in its performance. Therefore, this paper proposes a new design algorithm for HAPF based on the Social Spider Algorithm (SSA). This algorithm has the advantage that it is possible to determine the parameters of both the power circuit part and the control circuit part of HAPF. The achieved results are multi-purpose, such as: minimum total harmonic distortion of the supply current and source voltage, the maximum reactive power compensation into the system and satisfy many constraints such as: system stability, resonance conditions of the branches and the limits of the parameters. Compared to traditional design method using the Particle Swarm Optimization algorithm, the proposed algorithm shows the advantages of smaller total harmonic distortion of supply current and source voltage, and higher reactive power compensation into the grid while still meeting the constraints.

Packaging Technique for Gain Improvement of Multi-resonance CPW-fed Antenna for Satellite Applications Jalal Naghar; Azzeddin Naghar; Otman Aghzout; Ana Vazquez Alejos; Francisco Falcone
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v7i4.pp2094-2100

A suitable technique for gain improvement of multi-resonance CPW-fed antenna for satellite application at Ku-, K- and Ka-bands for user terminals is presented in this paper. New concept of stacking numerous layers with different dielectric material has been also presented. The conventional antenna design consists of a CPW-fed patch antenna with modified CPW elements printed on Rogers TMM4 substrate. In order to improve the antenna performance in term of gain and bandwidth, we propose two different configurations. The first one consists of designing a stacked structure by adding on the top of the single antenna an additional layer with parasitic elements. The dielectric added consists in Rogers RO3010 substrate with a high permittivity of 10.2. The proposed antenna is formed by two layers separated by an air gap; this new configuration provides major reduction on antenna beam width and allows gain enhancement. The second one implement the design of 2×1 and 4×1 series feed antenna arrays based on the conventional CPW-fed antenna. These array configurations are used to achieve higher gain in comparison with stacked solution. Finally we combined both techniques yielding the stacked 4×1 series feed antenna array. Fabricated CPW-fed antenna and the achieved results demonstrate the performance of presented techniques for gain improvements.

Chicken feed optimization using evolution strategies and firefly algorithm Andreas Nugroho Sihananto; M. Shochibul Burhan; Wayan Firdaus Mahmudy
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 1: February 2019
Publisher : Institute of Advanced Engineering and Science

Mixing broiler chicken and layer hens feed using various feed ingredients is a difficult task. The feed must fulfill the minimum nutrient requirement and must break the constraint. Some classic approach like Pearson’s Square has been already introduced to solve this problem. However, the approaches cannot guarantee to fulfill nutrient requirements and desirable price. The two metaheuristic algorithms Evolution Strategies (ES) and Firefly Algorithms (FA) are being proposed in this paper to know how well they performed this problems. Result show that ES is perform much better compared to classic Pearson’s Square, but ES itself is outperform by FA on both cases.

Advanced location-based IPv6 address for the node of wireless sensor network Mohammed Nazar Hussein; Raed Abdulla; Thomas O’ Daniel; Maythem Abbas
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 3: June 2020
Publisher : Institute of Advanced Engineering and Science

Fields such as military, transportation applications, human services, smart cities and many others utilized Wireless Sensor Network (WSN) in their operations. Despite its beneficial use, occurrence of obstacles is inevitable. From the sensed data, the randomly nodes distribution will produce multiple benefits from self-configuration and regular positioning reporting. Lately, localization and tracking issues have received a remarkable attention in WSNs, as accomplishing high localization accuracy when low energy is used, is much needed. In this paper, a new method and standards-compliant scheme according to the incorporation of GPS location data into the IPv6 address of WSN nodes is suggested. The suggestion is likewise others which depends on ground-truth anchor nodes, with a difference of using the network address to deliver the information. The findings from the results revealed that perfect GPS coordinates can be conducted in the IPv6 address as well as with the transmission radius of the node, and the information is significantly adequate to predict a node’s location. The location scheme performance is assessed in OMNet++ simulation according to the positioning error and the power metrics used. Moreover, some improvement practices to increase the precision of the node location are suggested.

A Numerical Model of Joule Heating in Piezoresistive Pressure Sensors Abdelaziz Beddiaf; Fouad Kerrour; Salah Kemouche
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 3: June 2016
Publisher : Institute of Advanced Engineering and Science

Thermal drift caused by Joule heating in piezoresistive pressure sensors affects greatly the results in the shift of the offset voltage of the such sensors. The study of the thermal behavior of these sensors is essential to define the parameters that cause the output characteristic drift. The impact of Joule heating in a pressure sensor has been studied. The study involves the solution of heat transfer equation considering the conduction in Cartesian coordinates for the transient regime using Finite Difference Method. We determine how the temperature affects the sensor during the applying a supply voltage. For this, the temperature rise generated by Joule heating in piezoresistors has been calculated for different geometrical parameters of the sensor as well as for different operating time. It is observed that Joule heating leads to important rise temperature in the piezoresistor and, hence, causes drift in the output voltage variations in a sensor during its operated in a prolonged time. This paper put emphasis on the geometric influence parameters on these characteristics to optimize the sensor performance. The optimization of geometric parameters of sensor allows us to reducing the internal heating effect. Results showed also that low bias voltage should be applied for reducing Joule heating.

Capacitance-Voltage Characteristics of Nanowire Trigate MOSFET Considering Wave Function Penetration Md. Alamgir Hossain; Arif Mahmud; Mahfuzul Haque Chowdhury; Md. Mijanur Rahman
International Journal of Electrical and Computer Engineering (IJECE) Vol 2, No 6: December 2012
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (246.919 KB)

Short channel effects on the gate capacitance of nanowire trigate MOS field-effect transistors are studied considering wave function penetration. Capacitance-Voltage (C‑V) measurements are commonly used in studying gate-oxide quality in detail. C‑V test results offer a wealth of device and process information, including bulk and interface charges. Capacitance indicates switching speed of the MOSFET. It is our goal to minimize capacitance as possible as we can in MOSFET. Due to our necessary to compact the Integrated Circuit as possible as we can for getting small electronics devices. Capacitance determines the speed of the IC. Every engineer in this section should know capacitance of his implementing device MOSFET to get exact result from this device. Whenever we deal with 10X10 nm scale or less device of MOSFET. We must concern the effect of wave function penetration into device in this stage classical mechanics fails to describe exact result of the system because electron can move in only one direction (x), in 3 Dimension, it cannot move in other two direction (y, z). i.e. confined in two direction which is not predictable by classical mechanics here quantum mechanics (QM) gives better solution of this problem. Therefore we consider QM in our study. Here we presented how wave function play vital role considering small area of trigate MOSFET. It is the analytical approach of QM and highly recommendation to use QM rather than CM to get accuracy. This result will be helpful for determining capacitance of trigate MOSFET.DOI:http://dx.doi.org/10.11591/ijece.v2i6.1785

Design and Analysis High Gain PHEMT LNA for Wireless Application at 5.8 GHz Kamil Pongot; Abdul Rani Othman; Zahriladha Zakaria; Mohamad Kadim Suaidi; Abdul Hamid Hamidon; J.S. Hamidon; Azman Ahmad
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 3: June 2015
Publisher : Institute of Advanced Engineering and Science

This research present a design of a higher gain (66.38dB) for PHEMT LNA using an inductive drain feedback technique for wireless application at 5.8GHz. The amplifier it is implemented using PHEMT FHX76LP transistor devices. The designed circuit is simulated with Ansoft Designer SV. The LNA was designed using T-network as a matching technique was used at the input and output terminal, inductive generation to the source and an inductive drain feedback. The low noise amplifier (LNA) using lumped-component provides a noise figure 0.64 dB and a gain (S21) of 68.94 dB. The output reflection (S22), input reflection (S11) and return loss (S12) are -17.37 dB, -15.77 dB and -88.39 dB respectively. The measurement shows the stability was at 4.54 and 3-dB bandwidth of 1.72 GHz. While, the low noise amplifier (LNA) using Murata manufactured component provides a noise figure 0.60 dB and a gain (S21) of 66.38 dB. The output reflection (S22), input reflection (S11) and return loss (S12) are -13.88 dB, -12.41 dB and -89.90 dB respectively. The measurement shows the stability was at 6.81 and 3-dB bandwidth of 1.70 GHz. The input sensitivity more than -80 dBm exceeded the standards required by IEEE 802.16.

Unit Commitment Problem in Electrical Power System: A Literature Review Idriss Abdou; Mohamed Tkiouat
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 3: June 2018
Publisher : Institute of Advanced Engineering and Science

Unit commitment (UC) is a popular problem in electric power system that aims at minimizing the total cost of power generation in a specific period, by defining an adequate scheduling of the generating units. The UC solution must respect many operational constraints. In the past half century, there was several researches treated the UC problem. Many works have proposed new formulations to the UC problem, others have offered several methodologies and techniques to solve the problem. This paper gives a literature review of UC problem, its mathematical formulation, methods for solving it and Different approaches developed for addressing renewable energy effects and uncertainties.

A computationally efficient detector for MIMO systems Samer Alabed
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 5: October 2019
Publisher : Institute of Advanced Engineering and Science

In this work, a newly designed multiple-input multiple-output (MIMO) detector for implementation on software-defined-radio platforms is proposed and its performance and complexity are studied. In particular, we are interested in proposing and evaluating a MIMO detector that provides the optimal trade-off between the decoding complexity and bit error rate (BER) performance as compared to the state of the art detectors. The proposed MIMO decoding technique appears to find the optimal compromise between competing interests encountered in the implementation of advanced MIMO detectors in practical hardware systems where it i) exhibits deterministic decoding complexity, i.e., deterministic latency, ii) enjoys a good complexity–performance trade-off, i.e., it keeps the complexity considerably lower than that of the maximum likelihood detectors with almost optimal performance, iii) allows fully parameterizable performance to complexity trade-off where the performance (or complexity) of the MIMO detector can be adaptively adjusted without the requirement of changing the implementation, iv) enjoys simple implementation and fully supports parallel processing, and v) allows simple and efficient extension to soft-bit output generation for support of turbo decoding. From the simulation results, the proposed MIMO decoding technique shows a substantially improved complexity–performance trade-off as compared to the state of the art techniques.

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Tole Sutikno

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Home Page

OAI Link

Editorial Team

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Contact Name Tole Sutikno

Contact Email ijece@iaesjournal.com

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Journal Mail Official ijece@iaesjournal.com

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Location Kota yogyakarta, Daerah istimewa yogyakarta INDONESIA

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Contact Name
Tole Sutikno

Contact Email
ijece@iaesjournal.com

Phone
-

Journal Mail Official
ijece@iaesjournal.com

Editorial Address
-

Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA