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International Journal of Electrical and Computer Engineering
ISSN : 20888708     EISSN : 27222578     DOI : -
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
Articles 6,301 Documents
Offline signature verification using DAG-CNN Javier O. Pinzón-Arenas; Robinson Jiménez-Moreno; César G Pachón-Suescún
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 4: August 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (641.031 KB) | DOI: 10.11591/ijece.v9i4.pp3314-3322

Abstract

This paper presents the implementation of a DAG-CNN which aims to classify and verify the authenticity of the offline signatures of 3 users, using the writer-independent method. In order to develop this work, 2 databases (training / validation and testing) were built manually, i.e. the manual collection of the signatures of the 3 users as well as forged signatures made by people not belonging to the base and altered by the same users were done, and signatures of another 115 people were used to create the category of non-members. Once the network is trained, its validation and subsequent testing is performed, obtaining overall accuracies of 99.4% and 99.3%, respectively, showing the features learned by the network and verifying the ability of this configuration of neural network to be used in applications for identification and verification of offline signatures.
An Internal Current Controlled BLDC Motor Drive Supplied with PV Fed High Voltage Gain DC-DC Converter G. G. Raja Sekhar; Basavaraja Banakara
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (436.662 KB) | DOI: 10.11591/ijece.v8i2.pp1262-1272

Abstract

The paper presents an efficient speed control of brushless DC (BLDC) motor drive for photo-voltaic (PV) system fed system. A high-gain DC-DC converter is employed in the system to boost the PV system low output voltage to a level required for the drive system. High-gain DC-DC converter is operated in closed-loop mode to attain accurate and steady output. The converter (VSI) for BLDC is switched at fundamental frequency and thus reducing high frequency switching losses. Internal current control method is developed and employed for the speed control of PV fed BLDC motor. The appropriateness of the internal current controller for the speed control of PV fed BLDC motor is verified for increamental speed with fixed torque and decreamental speed with fixed torque operating conditions. The system is developed and results are developed using MATLAB/SIMULINK software
High Speed and Low Pedestal Error Bootstrapped CMOS Sample and Hold Circuit Agung Setiabudi; Hiroki Tamura; Koichi Tanno
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 6: December 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (572.475 KB) | DOI: 10.11591/ijece.v8i6.pp4148-4156

Abstract

A new high speed, low pedestal error bootstrapped CMOS sample and hold (S/H) circuit is proposed for high speed analog-to-digital converter (ADC). The proposed circuit is made up of CMOS transmission gate (TG) switch and two new bootstrap circuits for each transistor in TG switch. Both TG switch and bootstrap circuits are used to decrease channel charge injection and on-resistance input signal dependency. In result, distortion can be reduced. The decrease of channel charge injection input signal dependency also makes the minimizing of pedestal error by adjusting the width of NMOS and PMOS of TG switch possible. The performance of the proposed circuit was evaluated using HSPICE 0.18-m CMOS process. For 50 MHz sinusoidal 1 V peak-to-peak differential input signal with a 1 GHz sampling clock, the proposed circuit achieves 2.75 mV maximum pedestal error, 0.542 mW power consumption, 90.87 dB SNR, 73.50 SINAD which is equal to 11.92 bits ENOB, -73.58 dB THD, and 73.95 dB SFDR.
The Weights Detection of Multi-criteria by using Solver Fachrurrazi Fachrurrazi; Yuwaldi Away; Saiful Husin
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 2: April 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (887.636 KB) | DOI: 10.11591/ijece.v7i2.pp858-868

Abstract

Multi criteria, which are generally used for decision analysis, have certain characteristics that relate to the purpose of the decision. Multi criteria have complex structures and have different weights depending upon the consideration of assessors and the purpose of the decision also. Expert’s judgment will be used to detect the criteria weights that applied by assessors. The aim of this study is a model to detect the criteria weights and biases on the subcontractor selection and detecting the significant weights, as decisive criteria. A method, which is used to modeling the weights detection, is the Solver Application. Data, totaling 40 sets, has been collected that consist of the assessor’s assessment and the expert’s judgment. The result is a pattern of weights and biases detection. The proposed model have been able to detect of 20 criteria weights and biases, that consist of 4 criteria in  the total weights of 60% (as decisive criteria) and 16 criteria in the total weights of 40%. A model has been built by training process performed by the Solver, which the result for MSE training is 9.73711e-08 and for MSE validation is 0.00900528. Novelty in the study is a model to detect pattern of weights criteria and biases on subcontractor selection by transferring the expert's judgment using Solver Application.
A planar UWB semicircular-shaped monopole antenna with quadruple band notch for WiMAX, ARN, WLAN, and X-Band Majed O. Al-Dwairi
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (867.943 KB) | DOI: 10.11591/ijece.v10i1.pp908-918

Abstract

This paper proposed quadruple notched frequency bands ultra-wideband (UWB) antenna. The antenna is a semicircular-shaped monopole type of a compact size 36x24 mm, covering frequency range of 3.02-14 GHz. Four rejected narrow bands including WiMAX (3.3-3.7GHz), ARN (4.2-4.5 GHz), WLAN (5.15-5.825GHz), X-Band (7.25-7.75) have been achieved using inserting slots techniques in the patch, feed line, and ground plane. The slots dimensions have been optimized for the required reject bands. The antenna design and analysis have been investigated by simulation study using CST-EM software package. The antenna characteristics including impedance bandwidth, surface current, gain, radiation efficiency, radiation pattern have been discussed.
Threshold Computation to Discover Cluster Structure: A New Approach Preeti Mulay
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (250.405 KB) | DOI: 10.11591/ijece.v6i1.pp275-282

Abstract

Cluster members are decided based on how close they are with each other. Compactness of cluster plays an important role in forming better quality clusters. ICNBCF incremental clustering algorithm computes closeness factor between every two data series. To decide members of cluster, it is necessary to know one more decisive factor to compare, threshold. Internal evaluation measure of cluster like variance and dunn index provide required decisive factor. in intial phase of ICNBCF, this decisive factor was given manually by investigative formed closeness factors. With values generated by internal evaluation measure formule, this process can be automated. This paper shows the detailed study of various evaluation measuress to work with new incremental clustreing algorithm ICNBCF.
Ant Colony Optimization for Optimal Low-Pass State Variable Filter Sizing Kritele Loubna; Benhala Bachir; Zorkani Izeddine
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (739.16 KB) | DOI: 10.11591/ijece.v8i1.pp227-235

Abstract

In analog filter design, discrete components values such as resistors (R) and capacitors (C) are selected from the series following constant values chosen. Exhaustive search on all possible combinations for an optimized design is not feasible. In this paper, we present an application of the Ant Colony Optimization technique (ACO) in order to selected optimal values of resistors and capacitors from different manufactured series to satisfy the filter design criteria. Three variants of the Ant Colony Optimization are applied, namely, the AS (Ant System), the MMAS (Min-Max AS) and the ACS (Ant Colony System), for the optimal sizing of the Low-Pass State Variable Filter. SPICE simulations are used to validate the obtained results/performances which are compared with already published works.
Performance Analysis of No Reference Image quality based on Human Perception Subrahmanyam CH; D. Venkata Rao; N. Usha Rani
International Journal of Electrical and Computer Engineering (IJECE) Vol 4, No 6: December 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (300.966 KB)

Abstract

In this work, a No-Reference objective image quality assessment based on NRDPF-IQA metric and classification based metric are tested using LIVE database, which consisting of Gaussian white noise, Gaussian blur, Rayleigh fast fading channel, JPEG compressed images, JPEG2000 images. We plot the Spearman’s Rank Order Correlation Coefficient [SROCC] between each of these features and human DMOS from the LIVE-IQA database using our proposed method to ascertain how well the features correlate with human judgement quality. The analysis of the testing and training is done by SVM model. The proposed method shows better results compared with the earlier methods. Finally, the results are generated by using MATLAB.DOI:http://dx.doi.org/10.11591/ijece.v4i6.6783
Daily Peak Load Forecast Using Artificial Neural Network Ramesh Kumar V; Pradipkumar Dixit
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 4: August 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (700.168 KB) | DOI: 10.11591/ijece.v9i4.pp2256-2263

Abstract

The paper presents an Artificial Neural Network (ANN) model for short-term load forecasting of daily peak load. A multi-layered feed forward neural network with Levenberg-Marquardt learning algorithm is used because of its good generalizing property and robustness in prediction. The input to the network is in terms of historical daily peak load data and corresponding daily peak temperature data. The network is trained to predict the load requirement ahead. The effectiveness of the proposed ANN approach to the short-term load forecasting problems is demonstrated by practical data from the Bangalore Electricity Supply Company Limited (BESCOM). The comparison between the proposed and the conventional methods is made in terms of percentage error and it is found that the proposed ANN model gives more accurate predictions with optimal number of neurons in the hidden layer.
A General Method to Parameter Optimization for Highly Efficient Wireless Power Transfer Kazuya Yamaguchi; Takuya Hirata; Ichijo Hodaka
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 6: December 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (15.188 KB) | DOI: 10.11591/ijece.v6i6.pp3217-3221

Abstract

This paper proposes a new and general method to optimize a working frequency and a load resistance in order to realize highly efficient wireless power transfer. It should be noticed that neither resonant frequency nor matched impedance maximizes efficiency of wireless power transfer circuit, in general. This paper establishes a mathematical model of a commonly used wireless power transfer circuit, and derives a mathematical expression of circuit efficiency which involves a working frequency, a load resistance and the other parameters as symbols. This enables us to find the optimal workingfrequency and load resistance. The result of this paper is compared with results by a method based on resonance and impedance matching, and then clarified by a numerical example.

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