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International Journal of Electrical and Computer Engineering
ISSN : 20888708     EISSN : 27222578     DOI : -
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
Articles 6,301 Documents
Reconfigurable High Performance Secured NoC Design Using Hierarchical Agent-based Monitoring System Kendaganna Swamy S; Anand Jatti; Uma B. V
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 6: December 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (546.797 KB) | DOI: 10.11591/ijece.v8i6.pp4164-4174

Abstract

With the rapid increase in demand for high performance computing, there is also a significant growth of data communication that leads to leverage the significance of network on chip. This paper proposes a reconfigurable fault tolerant on chip architecture with hierarchical agent based monitoring system for enhancing the performance of network based multiprocessor system on chip against faulty links and nodes. These distributed agents provide healthy status and congestion information of the network. This status information is used for further packet routing in the network with the help of XY routing algorithm. The functionality of Agent is enhanced not only to work as information provider but also to take decision for packet to either pass or stop to the processing element by setting the firewall in order to provide security. Proposed design provides a better performance and area optimization by avoiding deadlock and live lock as compared to existing approaches over network design.
SC-FDM-IDMA Scheme Employing BCH Coding Roopali Agarwal; Manoj K. Shukla
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 2: April 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (618.379 KB) | DOI: 10.11591/ijece.v7i2.pp992-998

Abstract

In OFDM-IDMA scheme, intersymbol interference (ISI) is resolved by the OFDM layer and multiple access interference (MAI) is suppressed by the IDMA layer at low cost . However OFDM-IDMA scheme suffers high peak-to-average power ratio (PAPR) problem. For removing high PAPR problem a hybrid multiple access scheme SC-FDM-IDMA has been proposed. In this paper, bit error rate (BER) performance comparison of SC-FDM-IDMA scheme, OFDM-IDMA scheme and IDMA scheme have been duly presented.  Moreover, the BER performance of various subcarrier mapping methods for SC-FDM-IDMA scheme as well as other results with variation of different parameters have also been demonstrated. Finally simulation result for BER performance improvement has been shown employing BCH code. All the simulation results demonstrate the suitability of SC-FDM-IDMA scheme for wireless communication under AWGN channel environment.
Powerplan : The alternative software for presentations at local area network using virtualtreeview and omnithread Daniel Silli Bataona; Rinaldi Munir; Tutun Juhana; Gloria Christiana Manulangga; Jemsrado Sine
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (9.29 KB) | DOI: 10.11591/ijece.v10i1.pp947-961

Abstract

The need for LCD projectors is very urgent, so even though they often experience shortcomings, it is impossible to continue to make purchases when needed to repair LCD projectors that require high costs such as buying a new device. Software development from the results of this study is not only beneficial for educational institutions but also for personal or specific institutions and institutions who want to conduct seminars, presentations, or other activities that involve many audiences. The advantage is that the audience will not experience problems such as when using an LCD projector, such as limited visibility, location or space, and the viewpoint of the audience on the Projector LCD / Screen. Another contribution that can be given from this research is a model of the teaching and learning process in real-time without using an LCD and only using a PC/ Laptop connected to the same LAN. It is a development of research that supports the concept of green computing because it also reduces the use of equipment LCD projector, but the usage function remains the same even more effective and interactive even without the device. Presentation model like this is the development of new models in the learning process using LAN networks but without using the internet connection and is the cross-platform model. This research can be the answer to the need for using LCD projectors that often occur in the process of education, meetings, or seminars that continue to increase every time. Also, the lack of LCD compared to the number of teaching needs in each class and the unstable electricity conditions and the low electricity ratio in East Nusa Tenggara, have resulted in frequent blackouts suddenly, so that makes the device LCD vulnerable to damage. The test results showed an increase in RTT along with the increasing number of servers conducting presentation activities. Testing on LAN networks with the same number of clients on each test shows that there was an increase of 18% and 75% in each addition to the number of servers. The best performance of Powerplan is still shown when the number of servers that present several five, with the response time of each client connected under two seconds.
Incremental Tag Suggestion for Landmark Image Collections Sutasinee Chimlek; Punpiti Piamsa-nga
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (496.549 KB) | DOI: 10.11591/ijece.v6i1.pp139-150

Abstract

In recent social media applications, descriptive information is collected through user tagging, such as face recognition, and automatic environment sensing, such as GPS. There are many applications that recognize landmarks using information gathered from GPS data. However, GPS is dependent on the location of the camera, not the landmark. In this research, we propose an automatic landmark tagging scheme using secondary regions to distinguish between similar landmarks. We propose two algorithms: 1) landmark tagging by secondary objects and 2) automatic new landmark recognition. Images of 30 famous landmarks from various public databases were used in our experiment. Results show increments of tagged areas and the improvement of landmark tagging accuracy.
Centeral Electric Field and Threshold Voltage in Accumulation Mode Junctionless Cylindrical Surrounding Gate MOSFET Hakkee Jung
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (782.702 KB) | DOI: 10.11591/ijece.v8i2.pp673-679

Abstract

Transfer characteristics is presented using analytical potential distribution of accumulation-mode junctionless cylindrical surrounding-gate (JLCSG) MOSFET, and deviation of center electric field at threshold voltage is analyzed for channel length and oxide thickness. Threshold voltages presented in this paper is good agreement with results of other compared papers, and transfer characteristics is agreed with those of two-dimensional simulation. The most important factor to determine threshold voltage is center electric field at source because the greater part of electron flows through center axis of JLCSG MOSFET. As a result of analysis for center electric field at threshold voltage, center electric field is decreased with reduction of channel length due to drain induced barrier lowering. Center electric field is increased with decrease of oxide thickness, and deviation of center electric field for channel length is significantly occurred with decrease of oxide thickness.
Security of Biometric Data Using Compressed Watermarking Technique Rohit Thanki; Komal Borisagar
International Journal of Electrical and Computer Engineering (IJECE) Vol 4, No 5: October 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (404.74 KB)

Abstract

This paper has focus on biometric data security over open communication channel of biometric system. Here biometric data is encoded using cs theory and wavelet based embedding technique. The biometric data is convert into encoded sparse measurements which is generating using SVD, random seed and uniform quantization process. Then these encoded sparse measurements are embedding into the host color biometric data using wavelet based watermarking technique. This proposed technique has explored dimension reduction and computational security provided by compressive sensing. This proposed technique has also helps to compressed and to send secret data over noisy communication channel of biometric system against various attacks. The proposed technique provides more security compare to existed technique in literature due to CS theory. The novelty of proposed technique is that, watermark iris image information is compressed and encoded using CS theory and uniform quantization.DOI:http://dx.doi.org/10.11591/ijece.v4i5.6646
Evaluation of Web Applications based on UX Parameters Anish Mistry; Arokia Paul Rajan
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 4: August 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (386.714 KB) | DOI: 10.11591/ijece.v9i4.pp2564-2570

Abstract

The objective of evaluating User Experience (UX) in this era of technology is to enhance the user satisfaction. Earlier applications were built with the aim of reducing the work of users. But with the evolution of the technology, the emergence of new gadgets and new trends in the information technology, the applications had to be more user-centric. The primary objective of this research is to evaluate the user experience of web applications based on different UX parameters using different techniques and given a rating. Each of these ratings are combined to determine the overall rating of UX for the web application. Also, the secondary objective of this research is to provide suggestions or recommendations based on the ratings to improve the UX of the web applications. An experimental study was conducted and the results show a significant improvement. Areas of further enhancements have also been identified and presented.
Implementation of Algorithm for Vehicle Anti-Collision Alert System in FPGA Aiman Zakwan Jidin; Lim Siau Li; Ahmad Fauzan Kadmin
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 2: April 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (434.116 KB) | DOI: 10.11591/ijece.v7i2.pp775-783

Abstract

Vehicle safety has becoming one of the important issues nowadays, due to the fact the number of road accidents, which cause injuries, deaths and also damages, keeps on increasing. One of the main factors which contribute to these accidents are human's lack of awareness and also carelessness. This paper presents the development and implementation of an algorithm to be utilized for vehicle anti-collision alert system, which may be useful to reduce the occurrence of accidents. This algorithm, which is to be deployed with the front sensors of the vehicle, is capable of alerting any occurrence of sudden slowing or static vehicles ahead, by sensing the rate of distance change. Furthermore, it also triggers an alert if the driver is breaching the safe distance from the vehicle ahead. This algorithm has been successfully implemented in Altera DE0 FPGA and its functionality was validated via hardware experimental tests.
A New Windings Design of 24 Slot Capacitor-Start Capacitor-Run Induction Motor Zuriman Anthony; Erhaneli Erhaneli
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 5: October 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1286.656 KB) | DOI: 10.11591/ijece.v8i5.pp3463-3470

Abstract

The conventional method of a single phase induction motor windings design usually constructed the main and auxiliary windings in both slot. So, there was a complicated winding design if that compare to the three-phase induction motor. Because of that, this study was aimed to design a new windings design of a single phase induction motor that construction like a three-phase induction motor. This study was focused to design a 24 slot capacitor-start capacitor-run induction motor. The windings in the motor are divided in 3 group like a three-phase induction motor. The two windings act as a main windings and the other winding act as auxiliary winding. The current rating of the winding of the proposed single-phase induction motor was 2.74A. The performances of the proposed method were compared with the performances of a three-phase induction motor that had the same current rating. The motor used as a comparator was a three-phase induction of 380/220V, 2.74/4.7A, Y/Δ, cage rotor, 4 poles, 1.5 HP, 1400 RPM, 50Hz. The result of this study showed that the proposed design of single phase induction motor could be operated with better performances than the three-phase comparator induction motor’s.
An accurate pattern classification for empty fruit bunch based on the age profile of oil palm tree using neural network Wafi Aziz; Afif Kasno; Nurkamilia Kamarudin; Zaidi Tumari; Shahrieel Aras; Herdy Rusnandi; Kamal Musa
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 6: December 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (824.346 KB) | DOI: 10.11591/ijece.v9i6.pp5636-5643

Abstract

This paper proposes an efficient method for pattern classification system of empty fruit bunch (EFB) by using a neural network technique. The main advantage of this method is the accuracy and speed of algorithm such that it can be computed rapidly with the proposed system. To test the effectiveness of the proposed method, 120 of EFB’s data with different ages and length that been obtained from Malaysian Palm Oil Board (MPOB) are use in the pattern classification process. In addition, there  are three classes of EFB in this system, which are Class 1 (less than 7 year old), Class 2 (8 to 17 year old) and Class 3 (more than 17 year old). It is envisaged that the proposed method is very useful in classifying the EFB and  90% of the sample parameters are successfully classified to its class.

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