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International Journal of Electrical and Computer Engineering

IJECE
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Published by Institute of Advanced Engineering and Science

ISSN : 20888708 EISSN : 27222578 DOI : -

Core Subject : Science, Engineering,

Computer Science & IT Electrical & Electronics Engineering

International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.

Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)

Articles 6,301 Documents

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Hybrid Speckle Noise Reduction Method for Abdominal Circumference Segmentation of Fetal Ultrasound Images Fajar Astuti Hermawati; Handayani Tjandrasa; Nanik Suciati
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 3: June 2018
Publisher : Institute of Advanced Engineering and Science

Fetal biometric size such as abdominal circumference (AC) is used to predict fetal weight or gestational age in ultrasound images. The automatic biometric measurement can improve efficiency in the ultrasonography examination workflow. The unclear boundaries of the abdomen image and the speckle noise presence are the challenges for the automated AC measurement techniques. The main problem to improve the accuracy of the automatic AC segmentation is how to remove noise while retaining the boundary features of objects. In this paper, we proposed a hybrid ultrasound image denoising framework which was a combination of spatial-based filtering method and multiresolution based method. In this technique, an ultrasound image was decomposed into subbands using wavelet transform. A thresholding technique and the anisotropic diffusion method were applied to the detail subbands, at the same time the bilateral filtering modified the approximation subband. The proposed denoising approach had the best performance in the edge preservation level and could improve the accuracy of the abdominal circumference segmentation.

Investigation of Rectifier Circuit Configurations for Microwave Power Transmission System Operating at S Band Chuc Huu Doan; Duong Gia Bach
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 5: October 2015
Publisher : Institute of Advanced Engineering and Science

The purpose of this work is to propose rectifier circuit topologies for microwave power transmission system operating at ISM band. This paper particularly presents in detail the proposed rectifier circuit configurations including series diode half wave rectifier and voltage doubler rectifier. The maximum conversion efficiency of rectifier using series diode half wave rectifier is 40.17 % with 220 W load resistance whereas it is 70.06 % with 330 W load resistance for voltage doubler rectifier. Compared to the series rectifier circuit, it is significant to note that the voltage doubler rectifier circuit has higher efficiency. The circuits presented are tuned for a center frequency of 2.45 GHz. The rectifiers were fabricated using microstrip technology. The design, fabrication and measurement results were obtained using a well-known professional design software for microwave engineering, Advanced Design System 2009 (ADS 2009). All design and measurement results will be reported.

Modified phase locked loop for grid connected single phase inverter Eyad Radwan; Khalil Salih; Emad Awada; Mutasim Nour
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 5: October 2019
Publisher : Institute of Advanced Engineering and Science

Connecting a single-phase or three-phase inverter to the grid in distributed generation applications requires synchronization with the grid. Synchronization of an inverter-connected distributed generation units in its basic form necessitates accurate information about the frequency and phase angle of the utility grid. Phase Locked Loop (PLL) circuit is usually used for the purpose of synchronization. However, deviation in the grid frequency from nominal value will cause errors in the PLL estimated outputs, and that’s a major drawback. Moreover, if the grid is heavily distorted with low order harmonics the estimation of the grid phase angle deteriorates resulting in higher oscillations (errors) appearing in the synchronization voltage signals. This paper proposes a modified time delay PLL (MTDPLL) technique that continuously updates a variable time delay unit to keep track of the variation in the grid frequency. The MTDPLL is implemented along a Multi-Harmonic Decoupling Cell (MHDC) to overcome the effects of distortion caused by gird lower order harmonics. The performance of the proposed MTDPLL is verified by simulation and compared in terms of performance and accuracy with recent PLL techniques.

High Speed Under-Sampling Frequency Measurements on FPGA Seyed Ehsan Yasrebi Naeini; Ali Maroosi
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 3: June 2017
Publisher : Institute of Advanced Engineering and Science

A Sampling rate is less than Nyquist rate in some applications because of hardware limitations. Consequently, extensive researches have been conducted on frequency detection from sub-sampled signals. Previous studies on under-sampling frequency measurements have mostly discussed under-sampling frequency detection in theory and suggested possible methods for fast under-sampling frequencies detection. This study examined few suggested methods on Field Programmable Gate Array (FPGA) for fast under-sampling frequencies measurement. Implementation of the suggested methods on FPGA has issues that make them improper for fast data processing. This study tastes and discusses different methods for frequency detection including Least Squares (LS), Direct State Space (DSS), Goertzel filter, Sliding DFT, Phase changes of Fast Furrier Transform (FFT), peak amplitude of FFT to conclude which one from these methods are suitable for fast under-sampling frequencies detection on FPGA. Moreover, our proposed approach for sub-sampling detection from real waveform has less complextity than previous approaches from complex waveform.

Subthreshold swing model using scale length for sub-10 nm junction-based double-gate MOSFETs Hakkee Jung
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

We propose an analytical model for subthreshold swing using scale length for sub-10 nm double gate (DG) MOSFETs. When the order of the calculation for the series type potential distribution is increased it is possible to obtain accuracy, but there is a problem that the calculation becomes large. Using only the first order calculation of potential distribution, we derive the scale length λ1 and use it to obtain an analytical model of subthreshold swing. The findings show this subthreshold swing model is in concordance with a 2D simulation. The relationship between the channel length and silicon thickness, which can analyze the subthreshold swing using λ1, is derived by the relationship between the scale length and the geometric mean of the silicon and oxide thickness. If the silicon thickness and oxide film thickness satisfy the condition of (Lg-0.215)/6.38 > tsi(=tox), it is found that the result of this model agrees with the results using higher order calculations, within a 4% error range.

Improving Hierarchical Decision Approach for Single Image Classification of Pap Smear Dwiza Riana; Yudi Ramdhani; Rizki Tri Prasetio; Achmad Nizar Hidayanto
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 6: December 2018
Publisher : Institute of Advanced Engineering and Science

The single image classification of Pap smears is an important part of the early detection of cervical cancer through Pap smear tests. Unfortunately, most classification processes still require accuracy enhancement, especially to complete the classification in seven classes and to get a qualified classification process. In addition, attempts to improve the single image classification of Pap smears were performed to be able to distinguish normal and abnormal cells. This study proposes a better approach by providing different handling of the initial data preparation process in the form of the distribution for training data and testing data so that it resulted in a new model of Hierarchial Decision Approach (HDA) which has the higher learning rate and momentum values in the proposed new model. This study evaluated 20 different features in hierarchical decision approach model based on Neural Network (NN) and genetic algorithm method for single image classification of Pap smear which resulted in classification experiment using value learning rate of 0.3 and momentum of 0.2 and value of learning rate of 0.5 and momentum of 0.5 by generating classification of 7 classes (Normal Intermediate, Normal Colummar, Mild (Light) Dyplasia, Moderate Dyplasia, Servere Dyplasia and Carcinoma In Situ) better. The accuracy value enhancemenet were also influenced by the application of Genetic Algorithm to feature selection. Thus, from the results of model testing, it can be concluded that the Hierarchical Decision Approach (HDA) method for Pap Smear image classification can be used as a reference for initial screening process to analyze Pap Smear image classification.

Designing and Simulation of Surrounding Supporting Multicast Routing Protocol Shaik Mahaboob Jani; Syed Umar; P.V.R.D Prasada Rao; Sridevi Gutta
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 2: April 2016
Publisher : Institute of Advanced Engineering and Science

In the Wireless sensor networks having of multi-hop transmission in the Adhoc networks. These Adhoc networks having advantages of limited bandwidth and mobility which is more useful for the changing of and usage of various protocols, so that these Adhoc networks having energy conservation, simple to construct, robustness. In this paper we are proposing a new protocol called Surrounding supporting multicast routing protocol [SSMRP]. This protocol uses the mesh networks to enhance the resilience against change of node. This SSMRP utilizes the node locality which reduces the overhead of the route maintenance and it also reduces the route for good data transmissions. In this paper we clearly explain how the data will be delivered efficiently by reducing the overheads.

Performance Analysis of Cooperative Hybrid Cognitive Radio Network with Various Diversity Techniques C.S. Preetham; M.S.G. Prasad; D.S.S.L. Saranya; Charan Teja Somepalli; D. Bhargava Satya Sai Krishna; V. Rohit
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 5: October 2016
Publisher : Institute of Advanced Engineering and Science

The extensive growth in wireless communications leads to spectrum scarcity. Since the spectrum is limited spectrum usage is clogged. The best possible solution is usage of cognitive radio. A cognitive radio network with sender, receiver and intermediate devices as relays is analyzed. The channel is modelled with noise considerations, path loss and variance. The system is defined with one primary sender and one primary receiver, in between them five secondary users and two active users. The signals from all these paths are estimated and analyzed to draw the best signal with good signal to noise ratio (SNR). To improve the channel efficiency and quality, we have considered various diversity techniques for which the fading problem of channel can be eliminated. In view of this, we concentrated on improving the system performance with various diversity techniques and optimum weight adaptation concept.

Economic Load Dispatch Downside with Valve - Point Result Employing a Binary Bat Formula Mallikrjuna Bestha; K. Harinath Reddy; O. Hemakeshavulu
International Journal of Electrical and Computer Engineering (IJECE) Vol 4, No 1: February 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (156.626 KB)

This paper proposes application of BAT algorithm for solving economic load dispatch problem. BAT algorithmic rule is predicated on the localization characteristics of micro bats. The proposed approach has been examined and tested with the numerical results of economic load dispatch problems with three and five generating units with valve point loading without considering prohibited operating zones and ramp rate limits. The results of the projected BAT formula are compared with that of other techniques such as lambda iteration, GA, PSO, APSO, ABC and basic principle. For each the cases, the projected algorithmic program outperforms the answer reported for the existing algorithms. Additionally, the promising results show the hardiness, quick convergence and potency of the projected technique.DOI:http://dx.doi.org/10.11591/ijece.v4i1.4233

Power distribution system fault monitoring device for supply networks in Nigeria Olalekan Kabiru Kareem; Aderibigbe Adekitan; Ayokunle Awelewa
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 4: August 2019
Publisher : Institute of Advanced Engineering and Science

Electric power is the bedrock of our modern way of life. In Nigeria, power supply availability, sufficiency and reliability are major operational challenges. At the generation and transmission level, effort is made to ensure status monitoring and fault detection on the power network, but at the distribution level, particularly within domestic consumer communities there are no fault monitoring and detection devices except for HRC fuses at the feeder pillar. Unfortunately, these fuses are sometimes replaced by a copper wire bridge at some locations rendering the system unprotected and creating a great potential for transformer destruction on overload. This study is focused on designing an on-site power system monitoring device to be deployed on selected household entry power cables for detecting and indicating when phase off, low voltage, high voltage, over current, and blown fuse occurs on the building’s incomer line. The fault indication will help in reducing troubleshooting time and also ensure quick service restoration. After design implementation, the test result confirms design accuracy, device functionality and suitability as a low-cost solution to power supply system fault monitoring within local communities.

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Tole Sutikno

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Daerah istimewa yogyakarta

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Home Page

OAI Link

Editorial Team

Contact

Reviewer

Google Scholar

Contact Name Tole Sutikno

Contact Email ijece@iaesjournal.com

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Journal Mail Official ijece@iaesjournal.com

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Location Kota yogyakarta, Daerah istimewa yogyakarta INDONESIA

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Contact Name
Tole Sutikno

Contact Email
ijece@iaesjournal.com

Phone
-

Journal Mail Official
ijece@iaesjournal.com

Editorial Address
-

Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA