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INDONESIA
Indonesian Journal of Electrical Engineering and Computer Science
Published by Institute of Advanced Engineering and Science
ISSN : 25024752     EISSN : 25024760     DOI : -
Core Subject :
Arjuna Subject : -
Articles 9,174 Documents
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Canny Junk System based on IOT D. Wilfred Shiju
Indonesian Journal of Electrical Engineering and Computer Science Vol 8, No 3: December 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v8.i3.pp639-641

Abstract

Waste organization is one of the fundamental issue that the world goes up against free of the case of made or making country. The key issue in the waste organization is that the junk canister at open spots stretches out beyond time some time as of late the start of the accompanying cleaning process. It is this way prompts distinctive dangers, for instance, horrendous aroma and disagreeableness to that place which may be the principle driver for spread of various afflictions. To avoid all such hazardous circumstance and keep up open cleanliness also, prosperity this work is mounted on a splendid decline structure. The guideline subject of the work is to develop a sagacious astute deny prepared structure for a real junk organization .This paper proposes a smart prepared structure for junk space by giving an alert banner to the common web server for minute cleaning of dustbin with honest to goodness check based on level of waste filling. This technique is bolstered by the ultrasonic sensor which is interfaced with Arduino UNO to check the level of waste filled in the dustbin and sends the alert to the common web server once if waste is filled. 
A Low Quiescent Current Fast Settling Capacitor-less Low Drop Out Regulator Employing Multiple Loops Suresh Alapati; Patri Sreehari Rao
Indonesian Journal of Electrical Engineering and Computer Science Vol 10, No 3: June 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v10.i3.pp1070-1079

Abstract

This paper presents a fast transient and low noise capacitor-less LDO using multiple loops. The proposed LDO exploits adaptive biasing, bulk modulation and a fast reacting control loop for achieving high performance striking reasonable tradeoffs among quiescent current, transient response and stability. The proposed LDO offers a load regulation of 0.095µV/mA while consuming quiescent current of 16 µA. It exhibits a load transient of 134.23mV with a settling time of 240.8ns against 0 to 100mA load variation with 40pF output capacitor. It exhibits an integrated noise of 31.027 pV2 /Hz at 10 Hz for a maximum load current of 100mA. The proposed LDO is designed using 0.18-µm 1P6 CMOS process.
An Efficient Lip-reading Method Using K-nearest Neighbor Algorithm Rashed Mustafa; Dingju Zhu
Indonesian Journal of Electrical Engineering and Computer Science Vol 13, No 1: January 2015
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar

Abstract

Many studies have been carried out on lip reading, most of those works are based on color images, while some essential features might not be obtained, like inner lip information. In this paper, RGB-D camera will be introduced for improving the recognition rate of lip reading. We try to complete lip reading through using only gray-scale images. Thirteen groups of words are given, and we present eight features for classification. Volunteers are asked to sit in the front of RGB-D camera. For each word we select 15 frames. K-nearest neighbor algorithm (KNN) is used to select the same words between different volunteers. DOI: http://dx.doi.org/10.11591/telkomnika.v13i1.6872 
An Optimized FPGA Implementation of CAN 2.0 Protocol Error Detection Circuitry Md Farukh Hashmi; Avinash G. Keskar
Indonesian Journal of Electrical Engineering and Computer Science Vol 6, No 3: June 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v6.i3.pp602-614

Abstract

Controller Area Network is an ideal serial bus design suitable for modern embedded system based networks. It finds its use in most of critical applications, where error detection and subsequent treatment on error is a critical issue. CRC (Cyclic Redundancy Check) block was developed on FPGA in order to meet the needs for simple, low power and low cost wireless communication. This paper gives a short overview of CRC block in the Digital transmitter based on the CAN 2.0 protocols. CRC is the most preferred method of encoding because it provides very efficient protection against commonly occurring burst errors, and is easily implemented. This technique is also sometimes applied to data storage devices, such as a disk drive. In this paper a technique to model the error detection circuitry of CAN 2.0 protocols on reconfigurable platform have been discussed? The software simulation results are presented in the form of timing diagram.FPGA implementation results shows that the circuitry requires very small amount of digital hardware. The Purpose of the research is to diversify the design methods by using VHDL code entry through Modelsim 5.5e simulator and Xilinx ISE8.3i.The VHDL code is used to characterize the CRC block behavior which is then simulated, synthesized and successfully implemented on Sparten3 FPGA .Here, Simulation and Synthesized results are also presented to verify the functionality of the CRC -16 Block. The data rate of CRC block is 250 kbps .Estimated power consumption and maximum operating frequency of the circuitry is also provided.
A Study of Meat Freshness Detection using Embedded-based pH Sensor Rajina R. Mohamed; Razali Yaacob; Mohamad A. Mohamed; Arniyati Ahmad; Munir Tajuddin
Indonesian Journal of Electrical Engineering and Computer Science Vol 12, No 3: December 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v12.i3.pp1386-1393

Abstract

For the past few years, food safety incidents often occur as a result of food poisoning from various food sources such as in schools, hospitals, night markets, street stalls and the like. When the quality of food is reduced due to the low level of freshness, cleanliness factor, safety and nutrition, it can contribute to health risks. According to World Health Organization, food poisoning ailment is a global problem and almost 1 in 10 people fall ill every year from eating degraded food and 420 000 die as a result. Factors such as cost savings, low awareness on food freshness and busy routine lifestyle aggravate the food poisoning problem. Hence it is important to at least maintain the freshness of the food mainly at the prominent area such as school and hospital. There are many methods used to test the freshness food, such as visual appearance, and also classical olfaction including normal olfactory and Scentometer, which requires trained panels to taste or smell the food samples to ensure the quality or strength of the odor. However, this method is rather subjective, because the human sense of smell and taste is different and may be influenced by the weather and experience. Conventional pH and litmus paper also are the alternatives, however the material itself is easily damaged and not suitable for the color blind person. In this paper, we presented raw meat examination using pH sensor based on food acidity. Examination of food freshness level is much easier using pH sensor since it is more practical to be used by consumers at home since it can be mobile, long lived, and accurate embedded-based application. Some testing has been conducted on sensor capability reacting with several buffer solutions on meat samples left at room temperature at various periods of time. Generally, the embedded pH sensor developed has successfully tested raw meat freshness level based on acidity level of meat.
Prediction of entering processes into the deadlock state Andrii Nicheporuk; Yuriy Klots; Oksana Yashyna; Sergiy Mostovyi; Yuriy Nicheporuk
Indonesian Journal of Electrical Engineering and Computer Science Vol 14, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v14.i3.pp1484-1492

Abstract

The work is devoted to the problem of processes’ deadlock in the multi-tasking system. On the basis of the study of the life cycle of the process, the boundary state of the process was distinguished, which will precede the deadlock state. Proposed the method for prediction of entering processes into the deadlock state, which consists of two algorithms: algorithm of detection of potential processes that may fall into the deadlock and algorithm of processes detection that falling into the state of deadlock. An evaluation of time complexity of proposed method is conducted. Unlike the known methods and algorithms, proposed method use fuzzy logic components to detect two or more processes that fall into the state of deadlock, and thus do not make the algorithm cumbersome, which allows it to be used in modern operating systems.
Comparison of Entropy Coding mechanism on IEEE1857.2 Lossless Audio Compression Standard Fathiah Abdul Muin; Teddy Surya Gunawan; Mira Kartiwi; Elsheikh M.A. Elsheikh
Indonesian Journal of Electrical Engineering and Computer Science Vol 10, No 1: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v10.i1.pp176-183

Abstract

This paper has two objectives. First, we aim to review and analyze the performance of the IEEE 1857.2 standard, focusing is on the Golomb-Rice and Arithmetic entropy algorithms as well as the effect of the pre-processing block on these entropy blocks. The pre-processing block normalizes the error residue of the Linear Predictive encoder, which then is passed to Entropy block, where the selector chooses the entropy encoder to use. The second objective is to present results from experimenting different existing algorithms available to benchmark it’. The results are discussed, and comparisons are made to identify the effect on compression ratio and encoding speed of the lossless encoder. As well as this, comparison is made to analyze effects of enabling and disabling the pre-processing output to the Entropy Coding block. We concluded that pre-processing block works well to flatten the output at lower predictor order for all the sound types, but works best at improving the residual output for music sound type.
Ambient Task With Stimulus-Response Compatibility Concept for Guiding Alzheimer’s Actions N. W. Basharudin; Ku Azir K.N.F; P. Ehkan; A. M. Khairuddin
Indonesian Journal of Electrical Engineering and Computer Science Vol 12, No 2: November 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v12.i2.pp548-555

Abstract

Alzheimer is one of the diseases that can cause the patient to act in different and unpredictable ways. This disease destroys memory and thinking skills and, eventually, the ability to carry out the simplest tasks. Advanced in technology actually can help them be more independent doing their routines. Hence, this study was conducted to investigate the relationship between stimulus-response compatibility (SRC) and ambient intelligent elements for Alzheimer’s patients. The aim of this study is to obtain a strong answer on how ambient elements (stimulus) such as ambient colours, lights and pictures can assist Alzheimer’ patients in daily living activities. For this reason, we developed a flashcard game based on ambient colours and pictures to achieve two objectives which are (i) to test the ambient’s factors that highly effect the responses of Alzheimer’s patients and (ii) to observe the response towards the given instructions. This experiment has been tested to 10 participants with mild-stage of Alzheimer’s disease. The findings of this experiment show that the patient response more towards ambient colours compared to the ambient pictures. 90% of respondents capable to complete the task correctly and quickly based on ambient colours. In addition, the experiment proved that the participants have no difficulty in order to understand the instructions given to them for completing the tasks smoothly.
Hybrid compensation of polarization-multiplexed QPSK optical format for high bit rate networks Omar Y. Shabaan; Omar A. Athab
Indonesian Journal of Electrical Engineering and Computer Science Vol 20, No 3: December 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v20.i3.pp1325-1331

Abstract

Transmitting the highest capacity throughput over the longest possible distance without any regeneration stage is an important goal of any long-haul optical network system. Accordingly, polarization-multiplexed quadrature phase-shift-keying (PM-QPSK) was introduced lately to achieve high bit-rate with relatively high spectral efficiency. Unfortunately, the required broad bandwidth of PM-QPSK increases the linear and nonlinear impairments in the physical layer of the optical fiber network. Increased attention has been spent to compensate for these impairments in the last years. In this paper, single mode fiber (SMF), single channel, PM-QPSK transceiver was simulated, with a mix of optical and electrical (digital signal processing (dsp) compensation stages to minimize the impairments  The behaviour of the proposed system was investigated under four conditions: without compensation, with only optical compensator, with only DSP compensator and finally with both compensators. An evidence improvement was noticed in the case of hybrid compensation; where the transmission distance was multiplied from (720 km) to more than (3000 km) at 40 Gb/s.
A Comprehensive Review of Fault Location Methods for Distribution Power System N Gana; NF Ab Aziz; Z Ali; H Hashim; Bahisham Yunus
Indonesian Journal of Electrical Engineering and Computer Science Vol 6, No 1: April 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v6.i1.pp185-192

Abstract

Fault on distribution system does not only affect the reliability of power supply, but also contribute to increasing operational and maintenance cost borne by the utilities. Throughout the years, various methods have been studied and practiced to solve problems related to the fault location in the distribution system. In this paper, the fault location methods are reviewed and summarised according to their categories. The fault location methods discussed in this paper are based on literature studies of outage mapping and field measurement for the distribution system. Furthermore, the component which influences the fault location methods such as unbalanced system, capacitance effects, distributed generation, and distribution topology are related to the explanation of the method. Finally, the field measurements are presented as in comparison which will clarify the effectiveness and the establishment of each method.

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