Articles
<![CDATA[Performance Evaluation of Centralized Reconfigurable Transmitting Power Scheme in Wireless Network-on-chip ]]>
<![CDATA[M. S. Rusli]]>;
<![CDATA[A. A. H. Ab Rahman]]>;
<![CDATA[U. U. Sheikh]]>;
<![CDATA[N. Shaikh Husin]]>;
<![CDATA[Michael L. P. Tan]]>;
<![CDATA[T. Andromeda]]>;
<![CDATA[M. N. Marsono]]>
<![CDATA[ TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 16, No 6: December 2018 ]]>
Publisher : <![CDATA[Universitas Ahmad Dahlan ]]>
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DOI: 10.12928/telkomnika.v16i6.9306
<![CDATA[Network-on-chip (NoC) is an on-chip communication network that allows parallel communication among all cores to improve inter-core performance. Wireless NoC (WiNoC) introduces long-range and high bandwidth radio frequency (RF) interconnects that can possibly reduce the multi-hop communication of the planar metal interconnects in conventional NoC platforms. In WiNoC, RF transceivers account for a significant power consumption, particularly its transmitter, out of its total communication energy. This paper evaluates the energy and latency performance of a closed loop power management mechanism which enables transmitting power reconfiguration in WiNoC based on number of erroneous received packets. The scheme achieves significant energy savings with limited performance degradation and insignificant impact on throughput.]]>
<![CDATA[SURFACE HARDENING CHARACTERIZATION OF TRANSMISSION GEARS ]]>
<![CDATA[Rifky Ismail]]>;
<![CDATA[. Jamari]]>;
<![CDATA[M. Tauviqirrahman]]>;
<![CDATA[. Sugiyanto]]>;
<![CDATA[Trias Andromeda]]>
<![CDATA[ Prosiding SNST Fakultas Teknik Vol 1, No 1 (2011): PROSIDING SEMINAR NASIONAL SAINS DAN TEKNOLOGI 2 2011 ]]>
Publisher : <![CDATA[Prosiding SNST Fakultas Teknik ]]>
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<![CDATA[This paper is presented to compare the transmission gear products from SME (UKM gear) and national scale manufacturer (OEM gear) especially on the surface hardening characterization. Both gears were heat treated with different methods. The gear product of SME was heat treated by pack carburizing and quenching whereas the OEM gear was predicted to be heat treated using induction heating with high frequency. The surface hardening characterization was conducted by investigating the hardening thickness, the hardness number and the microstructure observation on the gear surfaces. The result of the hardening thickness investigation reveals a distinction on the depth of hardening penetration. The heat treatment using long interval pack carburizing of UKM gear produces a deeper penetration and the higher hardness number on the gear surface whereas the OEM gear has a thin hardness penetration and lower hardness number. The microstructure of the both gears depicts the different types of phase. The SME gear shows the present of the carbon infiltration on the martensitic phase structure boundary whereas the OEM gear exhibits lower bainite phase on the gear surface. With this condition the OEM gear is predicted to behave a better contact stress distribution during operation. Keywords: gear, heat treatment, surface hardening, microstructure]]>
<![CDATA[Desain Konseptual Hybrid Engine System pada Kapal Tugboat 1636 HP dengan Kombinasi Diesel Engine dan Electric Motor Yang di Suplai Tenaga Baterai ]]>
<![CDATA[Timothy Andromeda Saragih]]>;
<![CDATA[Hartono Yudo]]>;
<![CDATA[Imam Pujo Mulyatno]]>
<![CDATA[ Jurnal Teknik Perkapalan Vol 8, No 4 (2020): Oktober ]]>
Publisher : <![CDATA[Diponegoro University ]]>
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<![CDATA[Hybrid Engine System adalah penggunaan penggerak ganda pada system penggerak yang sudah di temukan sejak tahun 1902 oleh Ferdinan Porsche. Sementara itu beberapa penelitian dan perusahaan telah mengembangkan system ini di kapal, salah satunya Tugboat. Penerapan system ini pada penelitian sebelumnya di kapal, telah terbukti memiliki dampak berkurangnya konsumsi bahan bakar realtime dan Time Between Overhaul (TBO) dari sebuah mesin konvensional. Penggunaan Bahan Bakar Minyak pada mesin internal combustion engine (konvesional) perlu diminimalisir penggunaannya untuk efisiensi jangka panjang. Penelitian pada tugas akhir ini bertujuan untuk menganalisa pengurangan komsumsi bahan bakar mesin utama kapal terhadap penerapan engine hybrid system. Pengerjaan diawali dengan menganalisa hambatan kapal menggunakan software, dengan metode Van Oortmeersen. Data hambatan yang telah didapat akan digunakan sebagai acuan untuk menentukan daya disetiap mode operasi tugboat. Variasi daya pada setiap mode operasi (standby, cruising, & assisting) digunakan untuk menentukan jumlah konsumsi BBM tugboat. Hasil analisa didapat konsumsi bahan bakar system permesinan hybrid mengurangi konsumsi BBM sebesar 19,06% dibanding system permesinan konvensional.]]>
<![CDATA[Energy-Aware Network-on-Chip Application Mapping Based on Domain Knowledge Genetic Algorithm ]]>
<![CDATA[Yin Zhen Tei]]>;
<![CDATA[Yuan Wen Hau]]>;
<![CDATA[N. Shaikh-Husin]]>;
<![CDATA[Trias Andromeda]]>;
<![CDATA[M. N. Marsono]]>
<![CDATA[ Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014 ]]>
Publisher : <![CDATA[IAES Indonesia Section ]]>
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DOI: 10.11591/eecsi.v1.352
<![CDATA[This paper addresses energy-aware application mapping for large-scale Network-on-chip (NoC). The increasing number of intellectual property (IP) cores in multi-processor system-on-chips (MPSoCs) makes NoC application mapping more challenging to find optimum core-to-topology mapping. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA) to minimize the energy consumption of NoC communication. The GA is initialized with knowledge on network partition whereas the genetic crossover operator is guided with inter-core communication demands. NoC energy estimation is based on analytical energy model and cycle-accurate Noxim simulation. For large-scale NoC, application mapping using knowledge-based genetic operator saves up to 28% energy compared to the one on conventional GA. Adding knowledge-based initial mapping speeds up convergence by 81% and further saves energy by 5% compared to only knowledge-based crossover GA. Furthermore, cycle-accurate simulations of applications with traffic dependency show the effectiveness of the proposed application mapping for large-scale NoC.]]>
<![CDATA[Online Data Stream Learning and Classification with Limited Labels ]]>
<![CDATA[Loo Hui Ru]]>;
<![CDATA[Trias Andromeda]]>;
<![CDATA[M. N. Marsono]]>
<![CDATA[ Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014 ]]>
Publisher : <![CDATA[IAES Indonesia Section ]]>
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DOI: 10.11591/eecsi.v1.366
<![CDATA[Mining data streams such as Internet traffic andnetwork security is complex. Due to the difficulty of storage, datastreams analytics need to be done in one scan. This limits thetime to observe stream feature and hence, further complicatesthe data mining processes. Traditional supervised data miningwith batch training natural is not suitable to mine data streams.This paper proposes an algorithm for online data streamclassification and learning with limited labels using selective selftrainingsemi-supervised classification. The experimental resultsshow it is able to achieve up to 99.6% average accuracy for 10%labeled data and 98.6% average accuracy for 1% labeled data. Itcan classify up to 34K instances per second.]]>
<![CDATA[Configurable Version Management Hardware Transactional Memory for Multi-processor Platform ]]>
<![CDATA[Jeevan Sirkunan]]>;
<![CDATA[Chia Yee Ooi]]>;
<![CDATA[N. Shaikh Husin]]>;
<![CDATA[Yuan Wen Hau]]>;
<![CDATA[Trias Andromeda]]>;
<![CDATA[M. N. Marsono]]>
<![CDATA[ Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014 ]]>
Publisher : <![CDATA[IAES Indonesia Section ]]>
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DOI: 10.11591/eecsi.v1.409
<![CDATA[Programming on a shared memory multi-processor platforms in an efficient way is difficult as locked based synchronization limits the efficiency. Transactional memory (TM) is a promising approach in creating an abstraction layer for multi-threaded programming. However, the performance of TM is application-specific. In general, the configuration of a TM is divided into version management and conflict management. Each scheme has its strengths and weaknesses depending on executing application. Previous TM implementations for embedded system were built on fixed version management configuration which results in significant performance loss when transaction behaviour changes. In this paper, we propose a hardware transactional memory (HTM) with interchangeable version management. Random requests at different contention levels are used to verify the performance of the proposed TM. The proposed architecture is targeted for embedded applications and is area-efficient compared to current implementations that apply cache coherence protocols.]]>
<![CDATA[Reconfigurable Logic Embedded Architecture of Support Vector Machine Linear Kernel ]]>
<![CDATA[Jeevan Sirkunan]]>;
<![CDATA[N. Shaikh-Husin]]>;
<![CDATA[Trias Andromeda]]>;
<![CDATA[M. N. Marsono]]>
<![CDATA[ Proceeding of the Electrical Engineering Computer Science and Informatics Vol 4: EECSI 2017 ]]>
Publisher : <![CDATA[IAES Indonesia Section ]]>
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DOI: 10.11591/eecsi.v4.991
<![CDATA[Support Vector Machine (SVM) is a linear binary classifier that requires a kernel function to handle non-linear problems. Most previous SVM implementations for embedded systems in literature were built targeting a certain application; where analyses were done through comparison with software im- plementations only. The impact of different application datasets towards SVM hardware performance were not analyzed. In this work, we propose a parameterizable linear kernel architecture that is fully pipelined. It is prototyped and analyzed on Altera Cyclone IV platform and results are verified with equivalent software model. Further analysis is done on determining the effect of the number of features and support vectors on the performance of the hardware architecture. From our proposed linear kernel implementation, the number of features determine the maximum operating frequency and amount of logic resource utilization, whereas the number of support vectors determines the amount of on-chip memory usage and also the throughput of the system.]]>
<![CDATA[A Comparisson of Synchronous and Nonsynchronous Boost Converter ]]>
<![CDATA[Mohamad Isnaeni Romadhon]]>;
<![CDATA[Trias Andromeda]]>;
<![CDATA[Mochammad Facta]]>;
<![CDATA[Agung Warsito]]>
<![CDATA[ Proceeding of the Electrical Engineering Computer Science and Informatics Vol 3: EECSI 2016 ]]>
Publisher : <![CDATA[IAES Indonesia Section ]]>
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DOI: 10.11591/eecsi.v3.1135
<![CDATA[Modern electronic systems require resources with high efficiency. The efficiency of direct current to dicrect current converters as a power source can be increased by replacing a diode with MOSFET. The use of MOSFET is expected to reduce power loss as the internal resistance of MOSFET is lower than a diode. To implement the propossed idea, a boost type direct current chopper and TL494 as PWM generator circuit were applied in this work. MOSFET is used in synchronization mode to replace diode at conventional topology of chopper.. The proposed circuit and conventional topology were made and their performance were observed. The efficiency of both circuit were compared and analyzed. The result of the experiments showed that the efficiency of converter within MOSFET at synchronization mode is proportional with the increment of duty cycle, while at conventional topology the efficiency remain stable at any duty cycle. Synchronous boost converter is more efficient than nonsynchronous boost converter at duty cycle over than 40%.]]>
<![CDATA[Cooperative Learning for Distributed In-Network Traffic Classification ]]>
<![CDATA[S.B. Joseph]]>;
<![CDATA[H.R. Loo]]>;
<![CDATA[I. Ismail]]>;
<![CDATA[T. Andromeda]]>;
<![CDATA[M.N. Marsono]]>
<![CDATA[ Proceeding of the Electrical Engineering Computer Science and Informatics Vol 3: EECSI 2016 ]]>
Publisher : <![CDATA[IAES Indonesia Section ]]>
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DOI: 10.11591/eecsi.v3.1144
<![CDATA[Inspired by the concept of autonomic distributed/decentralized network management schemes, we consider the issue of information exchange among distributed network nodes to network performance and promote scalability for in-network monitoring. In this paper, we propose a cooperative learning algorithm for propagation and synchronization of network information among autonomic distributed network nodes for online traffic classification. The results show that network nodes with sharing capability perform better with a higher average accuracy of 89.21% (sharing data) and 88.37% (sharing clusters) compared to 88.06% for nodes without cooperative learning capability. The overall performance indicates that cooperative learning is promising for distributed in-network traffic classification.]]>
<![CDATA[PERANCANGAN SISTEM AKUISISI DATA MULTISENSOR (TEGANGAN, ARUS) SEBAGAI SENSING PADA BATERAI ASAM-TIMBAL ]]>
<![CDATA[Abdi Hisan Alfatah]]>;
<![CDATA[Sudjadi Sudjadi]]>;
<![CDATA[Trias Andromeda]]>
<![CDATA[ Transient: Jurnal Ilmiah Teknik Elektro TRANSIENT, VOL. 10, NO. 1, MARET 2021 ]]>
Publisher : <![CDATA[Universitas Diponegoro ]]>
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DOI: 10.14710/transient.v10i1.252-257
<![CDATA[Pada proses pengisian baterai yang baik diperlukan feedback sebagai masukan kontroler untuk menjaga nilai arus dan tegangan pengisian lebih stabil. Pada tugas akhir ini dirancang sebuah sistem akuisisi data multisensor untuk memberikan feedback tegangan dan arus pada kontroler serta merekam data hasil pengisian baterai. Dengan menggunakan rangkaian pembagi tegangan dan current sense resistor untuk mendapatkan nilai tegangan dan arus disertai modul RTC, modul Micro SD dan LCD TFT Touchscreen untuk merekam data yang disertai dengan waktu yang bersifat real-time diharapkan sistem ini dapat membuat pengguna dapat mengamati dan memastikan proses pengisian sehingga tidak terjadi malfungsi maupun penanganan yang tidak bertanggungjawab pada proses pengisian baterai.]]>
