Garuda - Garba Rujukan Digital

p-Index From 2021 - 2026

0.702

P-Index

This Author published in this journals

All Journal Department of Naval Architecture TRANSIENT: Jurnal Ilmiah Teknik Elektro TELKOMNIKA (Telecommunication Computing Electronics and Control) Prosiding Seminar Nasional Sains Dan Teknologi Fakultas Teknik Proceeding of the Electrical Engineering Computer Science and Informatics

Andromeda, Trias

Departemen Teknik Elektro Fakultas Teknik, Universitas Diponegoro

Author-ID : 1685834

Civil Engineering, Building, Construction & Architecture Computer Science & IT Electrical & Electronics Engineering Engineering

Published : 15 Documents Claim Missing Document

Claim Missing Document

Articles

Title

Energy-Aware Network-on-Chip Application Mapping Based on Domain Knowledge Genetic Algorithm Yin Zhen Tei; Yuan Wen Hau; N. Shaikh-Husin; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014
Publisher : IAES Indonesia Section

This paper addresses energy-aware application mapping for large-scale Network-on-chip (NoC). The increasing number of intellectual property (IP) cores in multi-processor system-on-chips (MPSoCs) makes NoC application mapping more challenging to find optimum core-to-topology mapping. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA) to minimize the energy consumption of NoC communication. The GA is initialized with knowledge on network partition whereas the genetic crossover operator is guided with inter-core communication demands. NoC energy estimation is based on analytical energy model and cycle-accurate Noxim simulation. For large-scale NoC, application mapping using knowledge-based genetic operator saves up to 28% energy compared to the one on conventional GA. Adding knowledge-based initial mapping speeds up convergence by 81% and further saves energy by 5% compared to only knowledge-based crossover GA. Furthermore, cycle-accurate simulations of applications with traffic dependency show the effectiveness of the proposed application mapping for large-scale NoC.

Online Data Stream Learning and Classification with Limited Labels Loo Hui Ru; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014
Publisher : IAES Indonesia Section

Mining data streams such as Internet traffic andnetwork security is complex. Due to the difficulty of storage, datastreams analytics need to be done in one scan. This limits thetime to observe stream feature and hence, further complicatesthe data mining processes. Traditional supervised data miningwith batch training natural is not suitable to mine data streams.This paper proposes an algorithm for online data streamclassification and learning with limited labels using selective selftrainingsemi-supervised classification. The experimental resultsshow it is able to achieve up to 99.6% average accuracy for 10%labeled data and 98.6% average accuracy for 1% labeled data. Itcan classify up to 34K instances per second.

Configurable Version Management Hardware Transactional Memory for Multi-processor Platform Jeevan Sirkunan; Chia Yee Ooi; N. Shaikh Husin; Yuan Wen Hau; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 1: EECSI 2014
Publisher : IAES Indonesia Section

Programming on a shared memory multi-processor platforms in an efficient way is difficult as locked based synchronization limits the efficiency. Transactional memory (TM) is a promising approach in creating an abstraction layer for multi-threaded programming. However, the performance of TM is application-specific. In general, the configuration of a TM is divided into version management and conflict management. Each scheme has its strengths and weaknesses depending on executing application. Previous TM implementations for embedded system were built on fixed version management configuration which results in significant performance loss when transaction behaviour changes. In this paper, we propose a hardware transactional memory (HTM) with interchangeable version management. Random requests at different contention levels are used to verify the performance of the proposed TM. The proposed architecture is targeted for embedded applications and is area-efficient compared to current implementations that apply cache coherence protocols.

Reconfigurable Logic Embedded Architecture of Support Vector Machine Linear Kernel Jeevan Sirkunan; N. Shaikh-Husin; Trias Andromeda; M. N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 4: EECSI 2017
Publisher : IAES Indonesia Section

Support Vector Machine (SVM) is a linear binary classifier that requires a kernel function to handle non-linear problems. Most previous SVM implementations for embedded systems in literature were built targeting a certain application; where analyses were done through comparison with software im- plementations only. The impact of different application datasets towards SVM hardware performance were not analyzed. In this work, we propose a parameterizable linear kernel architecture that is fully pipelined. It is prototyped and analyzed on Altera Cyclone IV platform and results are verified with equivalent software model. Further analysis is done on determining the effect of the number of features and support vectors on the performance of the hardware architecture. From our proposed linear kernel implementation, the number of features determine the maximum operating frequency and amount of logic resource utilization, whereas the number of support vectors determines the amount of on-chip memory usage and also the throughput of the system.

A Comparisson of Synchronous and Nonsynchronous Boost Converter Mohamad Isnaeni Romadhon; Trias Andromeda; Mochammad Facta; Agung Warsito
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 3: EECSI 2016
Publisher : IAES Indonesia Section

Modern electronic systems require resources with high efficiency. The efficiency of direct current to dicrect current converters as a power source can be increased by replacing a diode with MOSFET. The use of MOSFET is expected to reduce power loss as the internal resistance of MOSFET is lower than a diode. To implement the propossed idea, a boost type direct current chopper and TL494 as PWM generator circuit were applied in this work. MOSFET is used in synchronization mode to replace diode at conventional topology of chopper.. The proposed circuit and conventional topology were made and their performance were observed. The efficiency of both circuit were compared and analyzed. The result of the experiments showed that the efficiency of converter within MOSFET at synchronization mode is proportional with the increment of duty cycle, while at conventional topology the efficiency remain stable at any duty cycle. Synchronous boost converter is more efficient than nonsynchronous boost converter at duty cycle over than 40%.

Cooperative Learning for Distributed In-Network Traffic Classification S.B. Joseph; H.R. Loo; I. Ismail; T. Andromeda; M.N. Marsono
Proceeding of the Electrical Engineering Computer Science and Informatics Vol 3: EECSI 2016
Publisher : IAES Indonesia Section

Inspired by the concept of autonomic distributed/decentralized network management schemes, we consider the issue of information exchange among distributed network nodes to network performance and promote scalability for in-network monitoring. In this paper, we propose a cooperative learning algorithm for propagation and synchronization of network information among autonomic distributed network nodes for online traffic classification. The results show that network nodes with sharing capability perform better with a higher average accuracy of 89.21% (sharing data) and 88.37% (sharing clusters) compared to 88.06% for nodes without cooperative learning capability. The overall performance indicates that cooperative learning is promising for distributed in-network traffic classification.

Co-Authors . Sugiyanto A. A. H. Ab Rahman Abdi Hisan Alfatah Agung Warsito Alfredo Bastianta Bukit Andreas Caesar Mahardika Utomo Bhaskara Wisnu Ardli Mahardika Budi Setiyono Chia Yee Ooi Enda Wista Sinuraya Gabriella Bintang Sitanggang H.R. Loo Hamasah Abdul Aziz Hartono Yudo Hau, Yuan Wen Hau, Yuan Wen Husin, N. Shaikh I. Ismail Imam Pujo Mulyatno Ismail, I. Isnaeni Romadhon, Mohamad Iwan Setiawan J. Jamari Jeevan Sirkunan Jeevan Sirkunan Joseph, S.B. Loo Hui Ru Loo, H.R. M. N. Marsono M. N. Marsono M. N. Marsono M. S. Rusli M.N. Marsono Marsono, M. N. Marsono, M. N. Marsono, M. N. Marsono, M.N. Michael L. P. Tan Mochammad Facta Mohamad Isnaeni Romadhon Mohammad Tauviqirrahman N. Shaikh Husin N. Shaikh Husin N. Shaikh-Husin N. Shaikh-Husin Ooi, Chia Yee Rifky Ismail Riva Amrulloh Ru, Loo Hui S.B. Joseph Shaikh-Husin, N. Shaikh-Husin, N. Sirkunan, Jeevan Sirkunan, Jeevan Sudjadi Tei, Yin Zhen U. U. Sheikh Yin Zhen Tei Yuan Wen Hau Yuan Wen Hau

Title Search

Found 6 Documents Search Journal : Proceeding of the Electrical Engineering Computer Science and Informatics

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Title

Found 6 Documents
Search
Journal : Proceeding of the Electrical Engineering Computer Science and Informatics