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International Journal of Electrical and Computer Engineering

IJECE
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Published by Institute of Advanced Engineering and Science

ISSN : 20888708 EISSN : 27222578 DOI : -

Core Subject : Science, Engineering,

Computer Science & IT Electrical & Electronics Engineering

International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.

Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)

Articles 6,301 Documents

135 136 137 138 139

Effect of Parasitic Elements on the Performance of Buck-Boost Converter for PV Systems Subramanya x Bhat; Nagaraja H N
International Journal of Electrical and Computer Engineering (IJECE) Vol 4, No 6: December 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1026.196 KB)

In the proposed study, MOSFET device used in buck-boost converter for PV systems is studied. The parameter of MOSFET Rds(on) is varied and its effect on output voltage is studied. The parasitic elements in inductor and capacitor such as resistance on buck-boost converter performance are studied. From the proposed study it has been found that the effect of parasitic resistance in capacitor is less as compared to parasitic resistance effect of inductor. Also the proposed study gives better insight into parasitic effect of Printed Circuit Board and losses incurred due to the same. In PV systems buck-boost converter is used to convert solar energy to electrical energy which is then stored in battery to drive the loads. These parasitic elements will have considerable effect on the performance of buck-boost converter such as efficiency and output voltage as validated by experimental results.DOI:http://dx.doi.org/10.11591/ijece.v4i6.6855

Online Data Preprocessing: A Case Study Approach Mohammed Zuhair Al-Taie; Seifedine Kadry; Joel Pinho Lucas
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 4: August 2019
Publisher : Institute of Advanced Engineering and Science

Besides the Internet search facility and e-mails, social networking is now one of the three best uses of the Internet. A tremendous number of volunteers every day write articles, share photos, videos and links at a scope and scale never imagined before. However, because social network data are huge and come from heterogeneous sources, the data are highly susceptible to inconsistency, redundancy, noise, and loss. For data scientists, preparing the data and getting it into a standard format is critical because the quality of data is going to directly affect the performance of mining algorithms that are going to be applied next. Low-quality data will certainly limit the analysis and lower the quality of mining results. To this end, the goal of this study is to provide an overview of the different phases involved in data preprocessing, with a focus on social network data. As a case study, we will show how we applied preprocessing to the data that we collected for the Malaysian Flight MH370 that disappeared in 2014.

A New Instrumentation Amplifier Architecture Based on Differential Difference Amplifier for Biological Signal Processing Zainul Abidin; Koichi Tanno; Shota Mago; Hiroki Tamura
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 2: April 2017
Publisher : Institute of Advanced Engineering and Science

In this paper, a new Instrumentation Amplifier (IA) architecture for biological signal pro-cessing is proposed. First stage of the proposed IA architecture consists of fully balance differential difference amplifier and three resistors. Its second stage was designed by using differential difference amplifier and two resistors. The second stage has smaller number of resistors than that of conventional one. The IA architectures are simulated and compared by using 1P 2M 0:6-m CMOS process. From HSPICE simulation result, lower common-mode voltage can be achieved by the proposed IA architecture. Average common-mode gain (Ac) of the proposed IA architecture is 31:26 dB lower than that of conventional one under 3% resistor mismatches condition. Therefore, the Ac of the proposed IA architecture is more insensitive to resistor mismatches and suitable for biological signal processing.

Markovian Queueing Model for Throughput Maximization in D2D-Enabled Cellular Networks Abiodun Gbenga-ilori; Olufunmilayo Sanusi
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 5: October 2018
Publisher : Institute of Advanced Engineering and Science

Device-to-Device (D2D) communication has been considered a key enabling technology that can facilitate spectrum sharing in 4G and 5G cellular networks. In order to meet the high data rate demands of these new generation cellular networks, this paper considers the optimization of available spectrum resource through dynamic spectrum access. The utilization of continuous-time Markov chain (CTMC) model for efficient spectrum access in D2D-enabled cellular networks is investigated for the purpose of determining the impact of this model on the capacity improvement of cellular networks. The paper considers the use of CTMC model with both queueing and non-queueing cases called 13-Q CTMC and 6-NQ CTMC respectively with the aim of improving the overall capacity of the cellular network under a fairness constraint among all users. The proposed strategy consequently ensures that spectrum access for cellular and D2D users is optimally coordinated by designing optimal spectrum access probabilities. Numerical simulations are performed to observe the impact of the proposed Markovian queueing model on spectrum access and consequently on the capacity of D2D-enabled cellular networks. Results showed that the proposed 13-Q CTMC provide a more spectrum-efficient sharing scheme, thereby enabling better network performances and larger capabilities to accommodate more users.

Design and implementation of smart farming system for fig using connected-argonomics N. Zainal; N. Mohamood; M. F. Norman; D. Sanmutham
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 6: December 2019
Publisher : Institute of Advanced Engineering and Science

This paper proposes a design and implementation approach of smart farming system using connected-agronomics technique for fig farm application. Nowadays, fig plants having a rapid growth in the current market demand due to its rich in natural health benefiting nutrients, antioxidants and vitamins where some farming systems have been used in maintaining fig plant’s environmental resources to grow without fail. Smart farming is a system applied to provide user with real time information and plan for desired plant such as time intervals for watering systems. There are two major problems on maintaining the fig fruit quality; watering system fail during emergency blackout and a contagious disease known as leaf rust due to external environments. The system implements two microcontrollers, the Arduino Uno & Raspberry Pi along with smartphone Android application. The system performance is evaluated based on the requirement specification, irrigation soil, surrounding temperature and moisture. It is found that all data collected by the sensors are within the optimal range of values, which are 1500 µS/cm to 1599 µS/cm for the EC reading of the fertilizer while 6.0 to 6.5 for the pH value of the soil. This prototype of smart farming was well developed and can be applied to the fig plantation environment.

The Effects of Nano Fillers on Space Charge Distribution in Cross-Linked Polyethylene A. N. Ramani; A. M. Ariffin; Gobinath Vijian; Ahmad Basri Abd Ghani
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 6: December 2017
Publisher : Institute of Advanced Engineering and Science

The performance of polymeric insulation will be distorted by the accumulation of space charge. This will lead to local electric field enhancement within the insulation material that can cause degradation and electrical breakdown. The introduction of nanofillers in the insulation material is expected to reduce the space charge effect. However, there is a need to analyze potential nanofillers to determine the best option. Therefore, the objective of this research work is to examine two types of nanofillers for Cross-Linked Polyethylene (XLPE); Zinc Oxide (ZnO) and Acrylic (PA40). The effects of these nanofillers were measured using the Pulsed-Electro Acoustic (PEA) method. The development of space charge is observed at three different DC voltage levels in room temperature. The results show that hetero charge distribution is dominant in pure XLPE materials. The use of both nanofiller types have significant effect in decreasing the space charge accumulation. With nanofillers, the charge profile changed to homo-charge distribution, suppressing the space charge formation. Comparisonbetween both the nanofillers show that PA40 has better suppression performance than ZnO.

The design of IPT system for multiple kitchen appliances using class E LCCL circuit N. X. Yin; Shakir Saat; S. H. Husin; Y. Yusop; M. R. Awal
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 4: August 2020
Publisher : Institute of Advanced Engineering and Science

Since many years ago, kitchen appliances are powered up by cable connected. This create a troublesome case as wire might tangle together and cause kitchen table messy. Due to this, wireless power technology (WPT) is introduced as its ability is to transmit power to load without physical contact. This leads to cordless solution better in safety as the product can be completely seal, highly expandable power range. This work focuses on the design of WPT based on inductive approach to power up multiple kitchen appliances. The selection of inductive approach over its partners capacitive and acoustic is mainly due to high power efficiency. Class E inverter is proposed here to convert the DC to AC current to drive the inductive link. A 1 MHz operating frequency is used. To ensure the circuit is robust with load variations, an LCCL impedance matching is proposed. This solution is table to maintain the output power if there is a slight change in load impedance. Finally, the developed prototype is able to supply 50V utput which can achieve power transmission up to 81.76%.

Introducing LQR-fuzzy for a dynamic multi area LFC-DR model Palakaluri Srividya Devi; R.Vijaya Santhi
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 2: April 2019
Publisher : Institute of Advanced Engineering and Science

It is well known that Load Frequency Control (LFC) model plays a vital role in electric power system design and operation. In the literature, much research works has stated on the advantages and realization of DR (Demand Response), which has proved to be an important part of the future smart grid. In an interconnected power system, if a load demand changes randomly, both frequency and tie line power varies. LFC-DR model is tuned by standard controllers like PI, PD, PID controllers, as they have constant gains. Hence, they are incapable of acquiring desirable dynamic performance for an extensive variety of operating conditions and various load changes. This paper presents the idea of introducing a DR control loop in the traditional Multi area LFC model (called LFC -DR) using LQR- Fuzzy Logic Control. The effect of DR-CDL i.e. (Demand Response Communication Delay Latency) in the design is also considered and is linearized using Padé approximation. Simulation results shows that the addition of DR control loop with proposed controller guarantees stability of the overall closed-loop LFC-DR system which effectively improves the system dynamic performance and is superior over a classical controller at different operating scenarios.

Evaluation of High Speed Hardware Multipliers - Fixed Point and Floating point Awais Ahmed; Syed Haider Abbas; Muhammad Faheem Siddique; Hussnain Haider
International Journal of Electrical and Computer Engineering (IJECE) Vol 3, No 6: December 2013
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (120.849 KB)

There is a huge demand in high speed arithmetic blocks, due to increased performance of processing units. For higher frequency clocks of the system, the arithmetic blocks must keep pace with greater requirement of more computational power. Area and speed are usually conflicting constraints so that improving speed results mostly in larger areas. In our research we will try to determine the best solution to this problem by comparing the results of different multipliers. Different sized of two algorithms for high speed hardware multipliers were studied and implemented ie. Parallel multiplier, Bit serial multiplier. The workings of these two multipliers were compared by implementing each of them separately in VHDL. A number of high speed adder designs are developed and algorithm and design of these adders are discussed. The result of this research will help us to choose the better option between serial and parallel multipliers for both fixed point and floating point multipliers to fabricate in different systems. As multipliers form one of the most important components of many systems, analysing different multipliers will help us to frame a better system with area and better speed.DOI:http://dx.doi.org/10.11591/ijece.v3i6.4185

De-Identified Personal Health Care System Using Hadoop Dasari Madhavi; B.V. Ramana
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 6: December 2015
Publisher : Institute of Advanced Engineering and Science

Hadoop technology plays a vital role in improving the quality of healthcare by delivering right information to right people at right time and reduces its cost and time. Most properly health care functions like admission, discharge, and transfer patient data maintained in Computer based Patient Records (CPR), Personal Health Information (PHI), and Electronic Health Records (EHR). The use of medical Big Data is increasingly popular in health care services and clinical research. The biggest challenges in health care centers are the huge amount of data flows into the systems daily. Crunching this Big Data and de-identifying it in a traditional data mining tools had problems. Therefore to provide solution to the de-identifying personal health information, Map Reduce application uses jar files which contain a combination of MR code and PIG queries. This application also uses advanced mechanism of using UDF (User Data File) which is used to protect the health care dataset. De-identified personal health care system is using Map Reduce, Pig Queries which are needed to be executed on the health care dataset. The application input dataset that contains the information of patients and de-identifies their personal health care. De-identification using Hadoop is also suitable for social and demographic data.

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Home Page

OAI Link

Editorial Team

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Contact Name Tole Sutikno

Contact Email ijece@iaesjournal.com

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Journal Mail Official ijece@iaesjournal.com

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Location Kota yogyakarta, Daerah istimewa yogyakarta INDONESIA

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Abstract

Contact Name
Tole Sutikno

Contact Email
ijece@iaesjournal.com

Phone
-

Journal Mail Official
ijece@iaesjournal.com

Editorial Address
-

Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA