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International Journal of Electrical and Computer Engineering

IJECE
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Published by Institute of Advanced Engineering and Science

ISSN : 20888708 EISSN : 27222578 DOI : -

Core Subject : Science, Engineering,

Computer Science & IT Electrical & Electronics Engineering

International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.

Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)

Articles 6,301 Documents

134 135 136 137 138

A Fast and Efficient Shape Descriptor for an Advanced Weed Type Classification Approach Adil Tannouche; Khalid Sbai; Miloud Rahmoune; Amine Zoubir; Rachid Agounoune; Rachid Saadani; Abdelali Rahmani
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 3: June 2016
Publisher : Institute of Advanced Engineering and Science

In weed management, the distinction between monocots and dicots species is an important issue. Indeed, the yield is much higher with the application of a selective treatment instead of using a broadcast herbicide overall the parcel. This article presents a fast shape descriptor designed to distinguish between these two families of weeds. The efficiency of the descriptor is evaluated by analyzing data with the pattern recognition process known as the discriminant factor analysis (DFA). Excellent results have been obtained in the differentiation between these two weed species

Neural Network for Electronic Nose using Field Programmable Analog Arrays Helmy Widyantara; Muhammad Rivai; Djoko Purwanto
International Journal of Electrical and Computer Engineering (IJECE) Vol 2, No 6: December 2012
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (651.801 KB)

Electronic nose is a device detecting odors which is designed to resemblethe ability of the human nose, usually applied to the robot. The process ofidentification of the electronic nose will run into a problem when the gaswhich is detected has the same chemical element. Misidentification due tothe similarity of chemical properties of gases is possible; it can be solvedusing neural network algorithms. The attendance of Field ProgrammableAnalog Array (FPAA) enables the design and implementation of ananalog neural network, while the advantage of analog neural networkwhich is an input signal from the sensor can be processed directly by theFPAA without having to be converted into a digital signal. Direct analogsignal process can reduce errors due to conversion and speed up thecomputing process. The small size and low power usage of FPAA are verysuitable when it is used for the implementation of the electronic nose thatwill be applied to the robot. From this study, it was shown that theimplementation of analog neural network in FPAA can support theperformance of electronic nose in terms of flexibility (resource componentrequired), speed, and power consumption. To build an analog neuralnetwork with three input nodes and two output nodes only need twopieces of Configurable Analog Block (CAB), of the four provided by theFPAA. Analog neural network construction has a speed of the process0.375 μs, and requires only 59 ± 18mW resources.DOI:http://dx.doi.org/10.11591/ijece.v2i6.1501

Blind Signal Processing Algorithmsbased based on Recursive Gradient Estimation Namyong Kim; Mingoo Kang
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 3: June 2015
Publisher : Institute of Advanced Engineering and Science

Blind algorithms based on the Euclidean distance (ED) between the output distribution function and a set of Dirac delta functions have a heavy computational burden of due to some double summation operations for the sample size and symbol points. In this paper, a recursive approach to the estimation of the ED and its gradient is proposed to reduce the computational complexity for efficient implementation of the algorithm. The ED of the algorithm is comprised of information potentials (IPs), and the IPs at the next iteration can be calculated recursively based on the currently obtained IPs. Utilizing the recursively estimated IPs, the next step gradient for the weight update of the algorithm can be estimated recursively with the present gradient. With this recursive approach, the computational complexity of gradient calculation has only . The simulation results show that the proposed gradient estimation method holds significantly reduced computational complexity keeping the same performance as the block processing method

1.5-V CMOS Current Multiplier/Divider Jetsdaporn Satansup; Worapong Tangsrirat
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 3: June 2018
Publisher : Institute of Advanced Engineering and Science

A circuit technique for designing a compact low-voltage current-mode multiplier/divider circuit in CMOS technology is presented. It is based on the use of a compact current quadratic cell able to operate at low supply voltage. The proposed circuit is designed and simulated for implementing in TSMC 0.25-m CMOS technology with a single supply voltage of 1.5 V. Simulation results using PSPICE, accurately agreement with theoretical ones, have been provided, and also demonstrate a maximum linearity error of 1.5%, a THD less than 2% at 100 MHz, a total power consumption of 508 W, and -3dB small-signal frequency of about 245 MHz.

How does technological parameters impact the static current gain of InP-based Single Heterojunction Bipolar Transistor? Jihane Ouchrif; Abdennaceur Baghdad; Aicha Sahel; Abdelmajid Badri; Abdelhakim Ballouk
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 5: October 2019
Publisher : Institute of Advanced Engineering and Science

In telecommunication systems, Heterojunction Bipolar Transistors (HBTs) are used extensively due to their good electrical characteristics. The work presented in this paper aims to enhance the electrical performance of the InP / InGaAs Single Heterojunction Bipolar Transistor (SHBT) in terms of the static current gain β. Silvaco’s TCAD tools were used for the simulation of the output characteristics of the studied electronic device. Initially, we used the interactive tool Deckbuild to define the simulation program and the device editor DevEdit to design the device structure, and we also used the simulator Atlas which allows the prediction of the electrical characteristics of most semiconductor devices. Because of several phenomena occuring within the electronic device SHBT, we added some physical models included in the simulator such as SRH, BBT.STD. Afterwards, we investigated the influence of doping concentrations of the base and the collector Nb and Nc on the electrical performance of the InP/InGaAs SHBT, and particularly in terms of the static current gain β. Finally, based on optimal values of the selected parameters, we have defined an optimized device that has a highest current gain β.

Cross Layer Solution for Energy and Delay Optimization in MANETs Bhagyashri R. Hanji; Rajashree Shettar
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 6: December 2018
Publisher : Institute of Advanced Engineering and Science

A novel method for packet forwarding in MANETs has been proposed in this paper. A node in the network acts as both host and router. Energy utilization of the node increases as all nodes in MANET operate as source, destination, and router to forward packets to the next hop ultimately to reach destination. Routers execute a variety of functions from simple packet classification for forwarding to complex payload revision. As the number of tasks and complexity increases, processing time required also increases resulting in significant processing delay in routers. The proposed work optimizes packet header at transport and network layer by calculating Unique Identifier using pairing function for the fields which do not change for a source–destination pair. This technique optimizes the processing cost of each packet header thereby conserving energy and reducing delay. It also simplifies the task of system administration. This paper elucidates an extension to basic AODV protocol, allowing routing of most packets without an explicit header, reducing the overhead of the protocol while still conserving its basic properties. The proposed method improves the network performance significantly compared to AODV, MTPR, and S-AODV protocol.

Design of Pervasive Discovery, Service and Control for Smart Home Appliances: An Integration of Raspberry Pi, UPnP Protocols and Xbee Sabriansyah Rizqika Akbar; Maystya Tri Handono; Achmad Basuki
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 2: April 2017
Publisher : Institute of Advanced Engineering and Science

Pervasive technology is an important feature in smart home appliances control. With pervasive technology, the user is able to discover and control every device and each service without initialization configuration and setup. Since single-board computer often used in smart home appliances, combining pervasive technology and microcomputer/single-board computer will be important to be applied and make a possibility to create a smart home system based on the requirement of it users that will be beneficial for the smart home users and the developers. This paper proposed a design of pervasive discovery, service, and control system for smart home appliances by integrating Raspberry Pi, UPnP protocols, and Xbee that able to control an RGB LED services such as switching, dimming, change color and read a temperature sensor as an example in smart home appliances. This paper enriched the raspberry Pi GPIO function to be able to control via TCP/IP network with UPnP protocol and receive information from a temperature sensor node via Xbee communication. Service control time is measured with UPnP round trip time by subtracting HTTP response arrival with HTTP request time. GPIO processing time measured at the application level by counting a timer that starts before GPIO process and ended after GPIO successfully executed.

Novel authentication framework for securing communication in internet-of-things Shamshekhar S. Patil; Arun Biradar
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Internet-of-Things (IoT) offers a big boon towards a massive network of connected devices and is considered to offer coverage to an exponential number of the smart appliance in the very near future. Owing to the nascent stage of evolution of IoT, it is shrouded by security loopholes because of various reasons. Review of existing research-based solution highlights the usage of conventional cryptographic-based solution over the traditional mechanism of data forwarding process between IoT nodes and gateway. The proposed system presents a novel solution to this problem by a model that is capable of performing a highly secured and cost-effective authentication process. The proposed system introduces Authentication Using Signature (AUS) as well as Security with Complexity Reduction (SCR) for the purpose to resist participation of any form of unknown threats. The outcome of the model shows better security strength with faster response time and energy saving of the IoT nodes.

Predictable Models and Experimental Measurements for Electric Properties of Polypropylene Nanocomposite Films Ahmed Thabet; Youssef A. Mobarak
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 1: February 2016
Publisher : Institute of Advanced Engineering and Science

This paper processed and characterized cost-fewer polypropylene (PP) nanocomposite films; an experimental work has been investigated for studying the electric properties of the new nanocomposite materials and compared with unfilled industrial materials in a frequency range up to 1 kHz. A small addition of nanoparticles (clay, and fumed silica) to polypropylene showed appreciable improvement in the electric reactance and conductance at different frequency up to 1kHz, in addition, an electric spectroscopy has been measured the electric properties of polypropylene with and without nanoparticles under variant temperatures (20°C, and 60°C). Cambridge Engineering Selector (CES) program were carried out the electrical/mechanical predictable models for the suggested materials. Finally, this paper leads to synthesize electrical insulating polypropylene nanocomposite films where the electrical properties are properly maintained in order to achieve more cost-effective, energy-effective and hence environmentally better materials for the electrical insulation technology.

A Unified Approach for Performance Degradation Analysis from Transistor to Gate Level Izhar Hussain; Marco Vacca; Fabrizio Riente; Mariagrazia Graziano
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

In this paper, we present an extensive analysis of the performance degradation in MOSFET based circuits. The physical effects that we consider are the random dopant fluctuation (RDF), the oxide thickness fluctuation (OTF) and the Hot-carrier-Instability (HCI). The work that we propose is based on two main key points: First, the performance degradation is studied considering BULK, Silicon-On-Insulator (SOI) and Double Gate (DG) MOSFET technologies. The analysis considers technology nodes from 45nm to 11nm. For the HCI effect we consider also the time-dependent evolution of the parameters of the circuit. Second, the analysis is performed from transistor level to gate level. Models are used to evaluate the variation of transistors key parameters, and how these variation affects performance at gate level as well.The work here presented was obtained using TAMTAMS Web, an open and publicly available framework for analysis of circuits based on transistors. The use of TAMTAMS Web greatly increases the value of this work, given that the analysis can be easily extended and improved in both complexity and depth.

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Tole Sutikno

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Daerah istimewa yogyakarta

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Home Page

OAI Link

Editorial Team

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Reviewer

Google Scholar

Contact Name Tole Sutikno

Contact Email ijece@iaesjournal.com

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Journal Mail Official ijece@iaesjournal.com

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Location Kota yogyakarta, Daerah istimewa yogyakarta INDONESIA

Abstract

Abstract

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Abstract

Abstract

Contact Name
Tole Sutikno

Contact Email
ijece@iaesjournal.com

Phone
-

Journal Mail Official
ijece@iaesjournal.com

Editorial Address
-

Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA