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International Journal of Electrical and Computer Engineering

IJECE
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Published by Institute of Advanced Engineering and Science

ISSN : 20888708 EISSN : 27222578 DOI : -

Core Subject : Science, Engineering,

Computer Science & IT Electrical & Electronics Engineering

International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.

Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)

Articles 6,301 Documents

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The telecom value chain, opportunities and revenues created by the nigerian telecom boom Nsikan Nkordeh; Uzairue Stanley Idiake; Ibinabo Bob-Manuel; Francis Anyasi
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

In Nigeria today, we face a serious economic challenge which is as a result of our swindling primary source of revenue (oil), there is fear amongst our economists which is can Nigeria bounce back to what she once was? Can there be an alternative source to serve as a buffer to what we already have. This study aims to bring to prime focus, an industry which has begun blooming in the background. Despite the publicity and popularity enjoyed by today’s telecom giants in the country, there is very little knowledge pertaining to the tremendous impact that it has had directly or indirectly on our economy over the years. Since the liberalization of the telecom industry that brought about the involvement of private investors into the sector, the opportunities and revenues generated has brought about a tremendous effect on the economy. The telecom sector is only second after the oil and gas industry in the amount of finance it contributes to the federal account. This paper discusses some of the value chains, opportunities, revenue that the telecom industry has brought to Nigeria. It uses data obtained from relevant authorities.

A Mixed Binary-Real NSGA II Algorithm Ensuring Both Accuracy and Interpretability of a Neuro-Fuzzy Controller Faouzi Titel; Khaled Belarbi
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 5: October 2017
Publisher : Institute of Advanced Engineering and Science

In this work, a Neuro-Fuzzy Controller network, called NFC that implements a Mamdani fuzzy inference system is proposed. This network includes neurons able to perform fundamental fuzzy operations. Connections between neurons are weighted through binary and real weights. Then a mixed binary-real Non dominated Sorting Genetic Algorithm II (NSGA II) is used to perform both accuracy and interpretability of the NFC by minimizing two objective functions; one objective relates to the number of rules, for compactness, while the second is the mean square error, for accuracy. In order to preserve interpretability of fuzzy rules during the optimization process, some constraints are imposed. The approach is tested on two control examples: a single input single output (SISO) system and a multivariable (MIMO) system.

New modification on feistel DES algorithm based on multi-level keys Suhad M. Kareem; Abdul Monem S. Rahma
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 3: June 2020
Publisher : Institute of Advanced Engineering and Science

The data encryption standard (DES) is one of the most common symmetric encryption algorithms, but it experiences many problems. For example, it uses only one function (XOR) in the encryption process, and the combination of data is finite because it occurs only twice and operates on bits. This paper presents a new modification of the DES to overcome these problems. This could be done through adding a new level of security by increasing the key space (using three keys) during the 16 rounds of the standard encryption algorithm and by replacing the predefined XOR operation with a new # operation. Our proposed algorithm uses three keys instead of one. The first key is the input key used for encrypting and decrypting operations. The second key is used for determining the number of bits, while the third key is used for determining the table numbers, which are from 0 to 255. Having evaluated the complexity of our proposed algorithm, the results show that it is the most complex compared with the well-known DES and other modified algorithms. Consequently, in our proposed algorithm, the attacker try a number of attempts 21173 at minimum to decrypt the message. This means that the proposed DES algorithm will increase the security level of the well-known DES.

Implimentation of Evolutionary Particle Swarm Optimization in Distributed Generation Sizing J.J. Jamian; M.W. Mustafa; H. Mokhlis; M.A. Baharudin
International Journal of Electrical and Computer Engineering (IJECE) Vol 2, No 1: February 2012
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (482.434 KB)

The size of Distributed Generation (DG) is very important in order to reduce the impact of installing a DG in the distribution Network. Without proper connection and sizing of DG, it will cause the power loss to increase and also might cause the voltage in the network to operate beyond the acceptable limit. Therefore, most researchers have concentrated on the optimization technique to regulate the DG’s output to compute its optimal size. In this paper, the concept of Evolutionary Particle Swarm Optimization (EPSO) method is implemented in sizing the DG units. By substituting the concept of Evolutionary Programming (EP) in some part of Particle Swarm Optimization (PSO) algorithm process, it will make the process of convergence become faster. The algorithm has been tested in 33bus distribution system with 3 units of DG that operate in PV mode. Its performance was compared with the performance when using the traditional PSO and without using any optimization method. In terms of power loss reduction and voltage profile, the EPSO can give similar performance as PSO. Moreover, the EPSO requires less number of iteration and computing time to converge. Thus, it can be said that the EPSO is superior in term of speed, while maintaining the same performance.DOI:http://dx.doi.org/10.11591/ijece.v2i1.227

System for Prediction of Non Stationary Time Series based on the Wavelet Radial Bases Function Neural Network Model Heni Kusdarwati; Samingun Handoyo
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 4: August 2018
Publisher : Institute of Advanced Engineering and Science

This paper proposes and examines the performance of a hybrid model called the wavelet radial bases function neural networks (WRBFNN). The model will be compared its performance with the wavelet feed forward neural networks (WFFN model by developing a prediction or forecasting system that considers two types of input formats: input9 and input17, and also considers 4 types of non-stationary time series data. The MODWT transform is used to generate wavelet and smooth coefficients, in which several elements of both coefficients are chosen in a particular way to serve as inputs to the NN model in both RBFNN and FFNN models. The performance of both WRBFNN and WFFNN models is evaluated by using MAPE and MSE value indicators, while the computation process of the two models is compared using two indicators, many epoch, and length of training. In stationary benchmark data, all models have a performance with very high accuracy. The WRBFNN9 model is the most superior model in nonstationary data containing linear trend elements, while the WFFNN17 model performs best on non-stationary data with the non-linear trend and seasonal elements. In terms of speed in computing, the WRBFNN model is superior with a much smaller number of epochs and much shorter training time.

Study of Data Security Algorithms using Verilog HDL M. Sumathi; D. Nirmala; R. Immanuel Rajkumar
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 5: October 2015
Publisher : Institute of Advanced Engineering and Science

This paper describes an overview of data security algorithms and its performance evaluation. AES, RC5 and SHA algorithms have been taken under this study. Three different types of security algorithms used to analyze the performance study. The designs were implemented in Quartus-II software. The results obtained for encryption and decryption procedures show a significant improvement on the performance of the three algorithms. In this paper, 128-bit AES, 64-bit of RC5 and 512-bit of SHA256 encryption and Decryption has been made using Verilog Hardware Description Language and simulated using ModelSim.

A Shortest Data Window Algorithm for Detecting the Power Factor in presence of non-sinusoidal load current Safaa S. Omran; Ali Sh. Al-Khalid; Amer Atta Yaseen
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 5: October 2019
Publisher : Institute of Advanced Engineering and Science

During recent years, nonlinear power electronic equipments introduce harmonic pollution on electric power systems. It makes the traditional power factor meter can not act accurately when it monitors unbalanced and harmonic loads. In this paper, a new algorithm for detecting the power factor in presence of non-sinusoidal load current is proposed. The proposed algorithm detects the true power factor exactly. By uses only two successive sampled data points of the voltage and the current for each displacement power factor value calculation and two sampled data points for each distortion power factor value calculation, the total/true power factor becomes easy to measure using these values directly. The proposed detector implemented using microcontroller as a main part and has been tested for single phase power system. The test results show that it can measure the true power factor of the loads quickly and accurately.

New Realization of Quadrature Oscillator using OTRA Gurumurthy Komanaplli; Neeta Pandey; Rajeshwari Pandey
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 4: August 2017
Publisher : Institute of Advanced Engineering and Science

In this paper a new, operational transresistance amplifier (OTRA) based, third order quadrature oscillator (QO) is presented. The proposed structure forms a closed loop using a high pass filter and differentiator. All the resistors employed in the circuit can be implemented using matched transistors operating in linear region thereby making the proposed structure fully integrated and electronically tunable. The effect of non-idealities of OTRA has been analyzed which suggests that for high frequency applications self-compensation can be used. Workability of the proposed QO is verified through SPICE simulations using 0.18μm AGILENT CMOS process parameters. Total harmonic distortion (THD) for the proposed QO is found to be less than 2.5%.The sensitivity, phasenoise analysis is also discussed for the proposed structure.

Threshold voltage model for hetero-gate-dielectric tunneling field effect transistors Ajay Kumar Singh; Tan Chun Fui; Tan Wee Xin Wilson
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

In this paper, a two dimensional analytical model of the threshold voltage for HGD TFET structure has been proposed. We have also presented the analytical models for the tunneling width and the channel potential. The potential model is used to develop the physics based model of threshold voltage by exploring the transition between linear to exponential dependence of drain current on the gate bias. The proposed model depends on the drain voltage, gate dielectric near the source and drain, silicon film thickness, work function of gate metal and oxide thickness. The accuracy of the proposed model is verified by simulation results of 2-D ATLAS simulator. Due to the reduction of the equivalent oxide thickness, the coupling between the gate and the channel junction enhances which results in lower threshold voltage. Tunneling width becomes narrower at a given gate voltage for the optimum channel concentration of 1016 /cm3. The higher concentration in the source (Ns) causes a steep bending in the conduction and valence bands compared to the lower concentration which results in smaller tunneling width at the source-channel interface.

Post Event Investigation of Multi-stream Video Data Utilizing Hadoop Cluster Jyoti Parsola; Durgaprasad Gangodkar; Ankush Mittal
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 6: December 2018
Publisher : Institute of Advanced Engineering and Science

Rapid advancement in technology and in-expensive camera has raised the necessity of monitoring systems for surveillance applications. As a result data acquired from numerous cameras deployed for surveillance is tremendous. When an event is triggered then, manually investigating such a massive data is a complex task. Thus it is essential to explore an approach that, can store massive multi-stream video data as well as, process them to find useful information. To address the challenge of storing and processing multi-stream video data, we have used Hadoop, which has grown into a leading computing model for data intensive applications. In this paper we propose a novel technique for performing post event investigation on stored surveillance video data. Our algorithm stores video data in HDFS in such a way that it efficiently identifies the location of data from HDFS based on the time of occurrence of event and perform further processing. To prove efficiency of our proposed work, we have performed event detection in the video based on the time period provided by the user. In order to estimate the performance of our approach, we evaluated the storage and processing of video data by varying (i) pixel resolution of video frame (ii) size of video data (iii) number of reducers (workers) executing the task (iv) the number of nodes in the cluster. The proposed framework efficiently achieve speed up of 5.9 for large files of 1024X1024 pixel resolution video frames thus makes it appropriate for the feasible practical deployment in any applications.

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Tole Sutikno

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Location
Kota yogyakarta,

Daerah istimewa yogyakarta

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Home Page

OAI Link

Editorial Team

Contact

Reviewer

Google Scholar

Contact Name Tole Sutikno

Contact Email ijece@iaesjournal.com

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Journal Mail Official ijece@iaesjournal.com

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Location Kota yogyakarta, Daerah istimewa yogyakarta INDONESIA

Abstract

Abstract

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Abstract

Contact Name
Tole Sutikno

Contact Email
ijece@iaesjournal.com

Phone
-

Journal Mail Official
ijece@iaesjournal.com

Editorial Address
-

Location
Kota yogyakarta,

Daerah istimewa yogyakarta

INDONESIA