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International Journal of Electrical and Computer Engineering
ISSN : 20888708     EISSN : 27222578     DOI : -
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
Articles 6,301 Documents
Reviewing effectivity in security approaches towards strengthening internet architecture Vidya M. S.; Mala C. Patil
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 5: October 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (255.663 KB) | DOI: 10.11591/ijece.v9i5.pp3862-3871

Abstract

The usage of existing Internet architecture is shrouded by various security loopholes and hence is highly ineffective towards resisting potential threats over internet. Hence, it is claimed that future internet architecture has been evolved as a solution to address this security gaps of existing internet architecture. Therefore, this paper initiates its discussion by reviewing the existing practices of web security in conventional internet architecture and has also discussed about some recent solutions towards mitigating potentially reported threats e.g. cross-site scripting, SQL inject, and distributed denial-of-service. The paper has also discussed some of the recent research contribution towards security solution considering future internet architecture. The proposed manuscripts contributes to showcase the true effectiveness of existing approaches with respect to advantages and limitation of existing approaches along with explicit highlights of existing research problems that requires immediate attention.
RF Energy Harvesting Study Using Various Metamaterial Patch Structure M. S. Zainudin; M. K. A. Rahim; N. A. Samsuri; H. A. Majid
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 3: June 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (495.263 KB) | DOI: 10.11591/ijece.v7i3.pp1574-1579

Abstract

The E-field absorbance performance of various metamaterial absorber structure is presented. The study started from the simulation of various design patch of metamaterial absorber. The performances are measured from the reflection coefficient, percentage of absorption, value of E-field and the surface current for circle, square and hexagon patch design of metamaterial absorber. From the simulation, it is shown that the circle patch design shows the most reliable design for harvest energy with the absorption of 99.85% and highest E-field concentration of 2.07 × 105 V/m.
A new RSA public key encryption scheme with chaotic maps Nedal Tahat; Ashraf A. Tahat; Maysam Abu-Dalu; Ramzi B. Albadarneh; Alaa E. Abdallah; Obaida M. Al-Hazaimeh
International Journal of Electrical and Computer Engineering (IJECE) Vol 10, No 2: April 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (782.575 KB) | DOI: 10.11591/ijece.v10i2.pp1430-1437

Abstract

Public key cryptography has received great attention in the field of information exchange through insecure channels. In this paper, we combine the Dependent-RSA (DRSA) and chaotic maps (CM) to get a new secure cryptosystem, which depends on both integer factorization and chaotic maps discrete logarithm (CMDL). Using this new system, the scammer has to go through two levels of reverse engineering, concurrently, so as to perform the recovery of original text from the cipher-text has been received. Thus, this new system is supposed to be more sophisticated and more secure than other systems. We prove that our new cryptosystem does not increase the overhead in performing the encryption process or the decryption process considering that it requires minimum operations in both. We show that this new cryptosystem is more efficient in terms of performance compared with other encryption systems, which makes it more suitable for nodes with limited computational ability.
UDP Pervasive Protocol Integration with IoT for Smart Home Environment using LabVIEW Mochammad Hannats Hanafi Ichsan; Wijaya Kurniawan; Sabriansyah Rizqika Akbar
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 6: December 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (928.253 KB) | DOI: 10.11591/ijece.v8i6.pp5342-5350

Abstract

Pervasive computing is an environment which is used and integrated into every object and activities to meet human needs and its existence isn’t perceived as something specific. The concept of Smart Home is to assist human needs in an everyday object that performs controls or being controlled. Based on previous research the used communication protocol is UDP (User Datagram Protocol) and the programming language is LabVIEW. UDP is used because it does not require handshaking in the broadcast process, as well as on the use of memory more efficient than other protocols. Devices which perform controls called Host and which is controlled called Client. Both of them (Things) have an ability to send data to the Internet without any human interaction. So this research wants to conduct pervasive protocol between Host and Client which each device is integrated with the Internet of Things (IoT). Data are posted at dweet.io that is a cloud server website that contains a simple online data submission which has free services. This research is conducted to measure the communication performance between host to client, host to cloud server and client to cloud server that represents household equipment.
High Performance Control of Grid Connected Cascaded H-Bridge Active Rectifier Based on Type II-Fuzzy Logic Controller with Low Frequency Modulation Technique M. Dabbaghjamanesh; A. Moeini; M. Ashkaboosi; P. Khazaei; K. Mirzapalangi
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 2: April 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (723.77 KB) | DOI: 10.11591/ijece.v6i2.pp484-494

Abstract

This paper tries to employ a fuzzy logic (FL) controller type II to control the Cascaded H-Bridge (CHB) active rectifier. This controller has strong performance, specially, when a low switching frequency Selective Harmonic Elimination (SHE) method is used. In order to regulate all of the DC link voltages, the optimum voltage balancing strategy in the low frequency modulation technique is used in the proposed method. Finally, the performance and effectiveness of the proposed method is validated in MATLAB environment.   All the simulation and result has been simulated by MATLAB software.
Design of Fuzzy Optimized Controller for Satellite Attitude Control by Two State actuator to reduce Limit Cycle based on Takagi-Sugeno Method Sobutyeh Rezanezhad
International Journal of Electrical and Computer Engineering (IJECE) Vol 4, No 3: June 2014
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (547.646 KB)

Abstract

In this paper, an algorithm was presented to control the satellite attitude in orbit in order to reduce the fuel consumption and increase longevity of satellite. Because of proper operation and simplicity, fuzzy controller was used to save fuel and analyze the uncertainty and nonlinearities of satellite control system. The presented control algorithm has a high level of reliability facing unwanted disturbances considering the satellite limitations. The controller was designed based on Takagi-Sugeno satellite dynamic model, a powerful tool for modeling nonlinear systems. Inherent chattering related to on-off controller produces limit cycles with low frequency amplitude. This increases the system error and maximizes the satellite fuel consumption. Particle Swarm Optimization (PSO) algorithm was used to minimize the system error. The satellite simulation results show the high performance of fuzzy on-off controller with the presented algorithm.DOI:http://dx.doi.org/10.11591/ijece.v4i3.5831
Efficient bridgeless SEPIC converter fed PMBLDC motor using artificial neural network Meena Devi R.; L. Premalatha
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 4: August 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (429.892 KB) | DOI: 10.11591/ijece.v9i4.pp3025-3031

Abstract

In this paper, a new design of Bridgeless SEPIC (Single Ended Primary Inductance converter) with Artificial neural network (ANN) fed PMBLDC Motor drive is proposed to improve Power Factor. The proposed converter has single switching device of MOSFET, so the switching losses is reduced.ANN is used to achieve the higher power factor and fixed dc link voltage. Also the ANN methodology the time taken for computation is less since there is no mathematical model. The output voltage depends on the switching frequency of the MOSFET. The BLSEPIC act as a buck operation in continuous conduction mode. Detailed converter analysis, equivalent circuit and closed-loop analysis are presented for 36V, 120W, 1500rpm BLDC Motor drive. This proposed converter produces low conduction loss, low total harmonic reduction, low settling time and high power factor reaching near-unity. All the simulation work is verified with MATLAB – Simulink.
An Energy Aware Resource Utilization Framework to Control Traffic in Cloud Network and Overloads Kavita A. Sultanpure; L. S. S. Reddy
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 2: April 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (365.755 KB) | DOI: 10.11591/ijece.v8i2.pp1018-1027

Abstract

Energy consumption in cloud computing occur due to the unreasonable way in which tasks are scheduled. So energy aware task scheduling is a major concern in cloud computing as energy consumption results into significant waste of energy, reduce the profit margin and also high carbon emissions which is not environmentally sustainable. Hence, energy efficient task scheduling solutions are required to attain variable resource management, live migration, minimal virtual machine design, overall system efficiency, reduction in operating costs, increasing system reliability, and prompting environmental protection with minimal performance overhead. This paper provides a comprehensive overview of the energy efficient techniques and approaches and proposes the energy aware resource utilization framework to control traffic in cloud networks and overloads.
A Novel Configuration of A Microstrip Power Amplifier based on GaAs-FET for ISM Applications Amine Rachakh; Larbi El Abdellaoui; Jamal Zbitou; Ahmed Errkik; Abdelali Tajmouati; Mohamed Latrach
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 5: October 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (473.889 KB) | DOI: 10.11591/ijece.v8i5.pp3882-3889

Abstract

Power Amplifiers (PA) are very indispensable components in the design of numerous types of communication transmitters employed in microwave technology. The methodology is exemplified through the design of a 2.45GHz microwave power Amplifier (PA) for the industrial, scientific and medical (ISM) applications using microstrip technology. The main design target is to get a maximum power gain while simultaneously achieving a maximum output power through presenting the optimum impedance which is characteristically carried out per adding a matching circuit between the source and the input of the power amplifier and between the load and the output of the power amplifier. A "T" matching technique is used at the input and the output sides of transistor for assure in band desired that this circuit without reflections and to obtain a maximum power gain. The proposed power amplifier for microwave ISM applications is designed, simulated and optimized by employing Advanced Design System (ADS) software by Agilent. The PA shows good performances in terms of return loss, output power, power gain and stability; the circuit has an input return loss of -38dB and an output return loss of -33.5dB. The 1-dB compression point is 8.69dBm and power gain of the PA is 19.4dBm. The Rollet's Stability measure B1 and the stability factor K of the amplifier is greater than 0 and 1 respectively, which shows that the circuit is unconditionally stable. The total chip size of the PA is 73.5× 36 mm2.
A New Proposal for OFCC-based Instrumentation Amplifier Deva Nand; Neeta Pandey
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 1: February 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (775.767 KB) | DOI: 10.11591/ijece.v7i1.pp134-143

Abstract

This contribution puts forward a new voltage mode instrumentation amplifier (VMIA) based on operational floating current conveyor (OFCC). It presents high impedance at input terminals and provides output at low impedance making the proposal ideal for voltage mode operation. The proposed VMIA architecture has two stages - the first stage comprises of two OFCCs to sense input voltages and coverts the voltage difference to current while the second stage has single OFCC that converts the current to voltage. In addition it employs two resistors to provide gain and imposes no condition on the values of resistors.  The behavior of the proposed structure is also analyzed for OFCC non idealities namely finite transimpedance and tracking error. The proposal is verified through SPICE simulations using CMOS based schematic of OFCC. Experimental results, by bread boarding it using commercially available IC AD844, are also included.

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