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INDONESIA
Indonesian Journal of Electrical Engineering and Computer Science
Published by Institute of Advanced Engineering and Science
ISSN : 25024752     EISSN : 25024760     DOI : -
Core Subject :
Arjuna Subject : -
Articles 9,174 Documents
 534   535   536   537   538 
A Novel Control Strategy Based Dynamic Voltage Restorer for Compensation of Voltage Harmonics in Distribution System Syed Suraya; P. Sujatha P; Bharat Kumar. P
Indonesian Journal of Electrical Engineering and Computer Science Vol 7, No 2: August 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v7.i2.pp338-347

Abstract

Power quality is one of the areas that the power sector is worried about. Power quality is the measure of practical system resemblance to ideal system. Voltage quality can be defined as the maintenance of voltage waveform shape close to ideal shape with proper magnitude and frequency. Even a slight change in voltage of the system can cause serious damage to the power system. Sensitive loads cannot adjust for small change in voltage. This paper presents Dynamic Voltage Restorer (DVR) for voltage harmonic suppression along with sag/swell compensation in distribution system. DVR is a voltage source converter which sends compensating signals when operated through switches of voltage source converter. This paper presents a novel control strategy to control DVR to block out the voltage harmonics in distribution system. The models and results are developed using MATLAB/SIMULINK software and comparative analysis of source voltage harmonics and load voltage harmonics during sag/swell compensation was tabulated.
Application-based Smart Parking System using CAN Bus Rahul Muppanagouda Patil; N R Vinay; Pratiba D
Indonesian Journal of Electrical Engineering and Computer Science Vol 12, No 2: November 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v12.i2.pp759-764

Abstract

We have witnessed a rapid growth in the Internet of Things and its contribution to the growth of Smart cities in recent years. Consistent efforts have been undertaken by the Government of India to elevate the growth of this industry. The increase in population and vehicular densities have led to congested roads, inadequate parking facilities and poor infrastructure has called for a technology-driven solution known com-monly as a Smart Parking System (SPS). The solution proposed in this paper is a client-based parking slot reservation system that is implemented using micro-controllers interfaced with sensors for parking vacancy detection. They are also connected to cloud services in order to produce a complete IoT solution, with each micro-controller acting as a node in a network. Additionally, the CAN protocol is deployed for communication between nodes of this network in case of failure of the nodes in the wireless network. This is a solution de-veloped that caters to users mainly residing in Smart Cities and addresses the issue of network node failure.
A passive islanding detection method for hybrid distributed generation system under balanced islanding Ramireddy chilakala; K Suresh; P Anusha; Sk Najma; B. I. Rajkumar; B. Prasanna Lakshmi
Indonesian Journal of Electrical Engineering and Computer Science Vol 14, No 1: April 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v14.i1.pp9-19

Abstract

To solve the energy consumption demand of the world and environmental problems in the future the distributed generation is considered an alternative approach. In this paper a new passive islanding detection technique was proposed for the Hybrid distributed generation (HDG) system based on changes in negative sequence voltage (NSV) and currents during an unintentional islanding. Islanding is caused in the distributed generation system due to failures in the power grid. As per distribution energy resources interconnection standards, it should be detected within 2 sec with the equipments connected to it. It is difficult to detect islanding during zero power imbalance condition. Sequence analyzer will separate the positive, negative and zero sequence components of voltages and currents from the voltages and currents obtained at the point of common coupling (PCC). During a wide range of power imbalance conditions the change in negative sequence voltage and currents are examined for islanding detection. The simulation shows that this method is free from Non detection zone, even at zero power imbalances between load and distribution generation. The computer simulations made in Matlab/ Simulink laboratory show the effectiveness of this method
Performance Of Full-Duplex One-Way And Two-Way Cooperative Relaying Networks Arunmozhi Sinouvassane; Nagarajan G
Indonesian Journal of Electrical Engineering and Computer Science Vol 9, No 2: February 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v9.i2.pp526-538

Abstract

The wireless research requires concurrent transmission and reception in a single time/frequency channel with good spectral efficiency. The Full duplex system is the alternate for the conventional half duplex systems. An investigation on the need for a full duplex two way (FD-TWR) and one way relaying (FD-OWR) to improve the performance of outage probability and average rate employing amplify-and-forward (AF) and decode-and-forward (DF) protocol is considered. Further the relaying systems performance under the network coding schemes is taken into consideration. The outage probability and average rate of FD-TWR and FD-OWR using a physical layer network coding was performed. In contrast to “straightforward” network coding which performs arithmetic function on digital bit streams after information have been received. The result shows the DF protocol achieves better outage probability and average rate, when compared to the AF protocol. And comparing the full duplex schemes like FD-TWR and FD-OWR, it is found that the FD-TWR achieves better outage probability and average rate, when compared to the FD-OWR. The performance was extended with different loop interference among the relay antennas. The performance show that FD-TWR performs well even in spite of loop interference. 
A Blind Identification and Equalization for MC-CDMA Transmission Channel using a New of Adaptive Filter Algorithm ATIFY Elmostafa; Cherki Daoui; Ahmed BOUMEZZOUGH
Indonesian Journal of Electrical Engineering and Computer Science Vol 5, No 2: February 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v5.i2.pp352-362

Abstract

A review of literature shows that there are a variety of adaptive filters. In this research study, we propose a new type of adaptive filter that increases the diversification used to compensate the channel distortion effect in the MC-CDMA transmission. First, we show expressions of the impulse responses of the filter in the case of a perfect channel. The adaptive filter  was simulated was experienced by blind equalization for different cases of Gaussian white noise in the case of an MC-CDMA transmission  with orthogonal frequency baseband for mobile radio downlink channel Bran A. Simulation Results  of the proposed model shows the performance of the identification and blind equalization algorithm for MC-CDMA transmission chain using IFFT.
Modified SHA-1 Algorithm Rogel Ladia Quilala; Ariel M Sison; Ruji P Medina
Indonesian Journal of Electrical Engineering and Computer Science Vol 11, No 3: September 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v11.i3.pp1027-1034

Abstract

Hashes are used to check the integrity of data. This paper modified SHA-1 by incorporating mixing method in every round for better diffusion. The modification increased the hash output to 192-bits. Increasing the output increases the strength because breaking the hash takes longer. Based on the different message types, avalanche percentage of modified SHA-1 showed better diffusion at 51.64%, higher than the target 50%, while SHA-1 achieved 46.61%. The average execution time noted for modified SHA-1 is 0.33 seconds while SHA-1 is 0.08 seconds. Time increases as the number of messages hashed increases; the difference is negligible in fewer messages. On character hits, that is - no same character in the same position, modified SHA-1 achieved lower hit rate because of the mixing method added. The modifications’ effectiveness was also evaluated using a hash test program. After inputting 1000 hashes from random strings, the result shows no duplicate hash.
Notice of Retraction Utilizing the ATM technology in e-distance learning Abbas Hieder, Inaam; Mohammad Abdullah, Sara; Ahmed Ali, Rawaa
Indonesian Journal of Electrical Engineering and Computer Science Vol 20, No 2: November 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v20.i2.pp1016-1029

Abstract

Notice of Retraction-----------------------------------------------------------------------A duly constituted expert committee found this paper to be in violation of IAES's publication principles after carefully and thoughtfully reviewing its content.We hereby retract this paper's content. We should make a reasonable effort to remove all past references to this paper.The presenting author of this paper has the option to appeal this decision by contacting ijeecs@iaescore.com, cc: info@iaesjournal.com.-----------------------------------------------------------------------There is an Increasing demand for the education in the field of E-learning specially the higher education, and to keep contiuity between the user and the course director in any place and time. This research presents a proposed and simulation multimedia network design for distance learning utilizing ATM technique. The propsed framework determines the principle of ATM technology and shows how multimedia can be integrated within E- learning conteext. The first part of this research presents a theoretical design for the Electricity Department, university of technology. The purpose is to illustrate the usage of the ATM and Multimedia in distance learning process. In addition, this research composes two entities: Software entity by using image, sound and a mix between them to be transfered across the ATM network.. The MATLAB was used to validate the implementation of the required design objectives: (hardware entity) where a prototype is designed (experimental trial) , which aims to carry out the connectivity process between the user and course director, where multiple PCs are connected via unshielded twisted pair (UTP) and a web camera with microphone have been attached to PCs. To finalize this stage, an interface is implemented to show the data transmission process for multimedia by the ATM network and it has been realized through the Visual Basic language. Finally, to validate the level of success by using the ATM technique, some important factors have been determined through the analysis phase, which are: time delay, throughput and efficiency. The propsed design manages to minimize the impat of noise and improve the throuput ratio by 30% while minizing the delay with a ratio of 22%.
A Series Regeneration Converter Technique for Voltage Balancing of Energy Storage Devices A K M Ahasan Habib; S. M. A. Motakabber; Muhammad I. Ibrahimy
Indonesian Journal of Electrical Engineering and Computer Science Vol 8, No 2: November 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v8.i2.pp475-481

Abstract

A single series resonant converter has been designed to balance the voltage level of a storage battery for electric vehicles. The proposed design has been simulated and verified by using two 100F supercapacitors instate of the conventional rechargeable battery. A voltage monitoring circuit detects the voltage condition of the individual capacitor and sends the voltage status to the control circuit for action. A technique has been developed to control a set of switches to transfer the current between the capacitor to balance the voltage level. The MATLAB simulated result shows the balancing circuit decreases the voltage difference between the two supercapacitors from 200 mV to 0V in 140 seconds, which is less than the existing methods. This fast voltage balancing technique can be used in the battery management system or electric vehicles for long lasting the battery life. Keywords: Voltage balancing; electric vehicles; supercapacitor; battery; series resonant converter
Electronic controlled CMOS inductor with patterned metal ground shields for fine inductance tuning application Nur Syahadah Yusof; Norlaili Mohd Noh; Jagadheswaran Rajendran; Asrulnizam Abd Manaf; Shukri Korakkottil Kunhi Mohd; Yusman Mohd. Yusof; Harikrishnan Ramiah; Mohamed Fauzi Bin Packeer Mohamed
Indonesian Journal of Electrical Engineering and Computer Science Vol 14, No 2: May 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v14.i2.pp937-948

Abstract

This paper is on an inductance fine tuning technique which benefits from the idea of varying the number of metal plates of an inductor’s pattern ground shield (PGS) shorted to ground to change its magnetic fields. This technique is unique because the geometry and physical shape of the inductor remains untouched from its form in the process design kit (PDK) while the inductance is being tuned. The number of metal shields shorted to ground was controlled by an electronic circuit which consists of analog-to-digital converters and active switches. Both Sonnet EM simulator and Cadence Virtuoso were used for the inductor and circuit simulations. From the simulation, it was found that the inductance increased while the Q-factor decreased as more metal shields were shorted to ground. For instance, at 1.6 GHz, the simulated inductance was 8.8 nH when all metals were floated and 9.4 nH when all metals were shorted to ground. On the other hand, the simulated Q-factor was 10.4 when all metals were floated and 9.8 when all metals were shorted to ground. From both simulation and measured results, both inductance and inductance tuning range increased with frequency. From the measured results too, the inductance observed was 9.4 nH at 1.6 GHz, 10.8 nH at 2 GHz, and 13.5 nH at 2.5 GHz when all the metal shields were shorted to ground. The inductance tuning range was 6.2% at 1.6 GHz, 12.5% at 2 GHz, and 20% at 2.5 GHz. The measured results showed good correlation with the simulated results trend, but with smaller value of inductance, inductance tuning range and Q-factor.
Quantitative Analysis and Comparison of Symmetric Cryptographic Security Algorithms Mahaba Saad; Khalid Youssef; Hala Abdel-Kader
Indonesian Journal of Electrical Engineering and Computer Science Vol 4, No 1: October 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v4.i1.pp116-124

Abstract

Nowadays, the rapid evolution of communication systems offers, to a very large percentage of population, access to a huge amount of information and a variety of means to use in order to exchange personal data. Hence the search for the best solution to offer the necessary protection against the data intruders’ attacks along with providing these services in time is one of the most interesting subjects in the security related communities. Cryptography is usually referred to as “the study of secret”. Encryption is the process of converting normal text to unreadable form. There are a variety of encryption algorithms have been developed. This paper provides quantitative analysis and comparison of some symmetric key cryptographic ciphers (DES, 3DES, AES, Blowfish, RC5, and RC6).  The quantitative analysis approach is a step towards optimizing the security operations for an efficient next generation family of network processors with enhanced speed and power performance. A framework will be proposed as a reference model for quantitative analysis of security algorithm mathematical and logical operations. 

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