Bulletin of Electrical Engineering and Informatics
Bulletin of Electrical Engineering and Informatics (Buletin Teknik Elektro dan Informatika) ISSN: 2089-3191, e-ISSN: 2302-9285 is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world. The journal publishes original papers in the field of electrical, computer and informatics engineering.
Articles
2,901 Documents
Synthesis of (Poly-methyl Methacrylate-lead Oxide) Nanocomposites and Studying their A.C Electrical Properties for Piezoelectric Applications
Dalal Hassan;
Ahmed Hashim
Bulletin of Electrical Engineering and Informatics Vol 7, No 4: December 2018
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v7i4.969
Piezoelectric materials have been prepared from (poly-methyl methacrylate-lead oxide) nanocomposites for electronic applications. The lead oxide nanoparticles were added to poly-methyl methacrylate by different concentrations are (4, 8, and 12) wt%. The structural and dielectric properties of nanocomposites were studied. The results showed that the dielectric constant and dielectric loss of nanocomposites decrease with increase in frequency of applied electric field. The A.C electrical conductivity increases with increase in frequency. The dielectric constant, dielectric loss and A.C electrical conductivity of poly-methyl methacrylate increase with increase in lead oxide nanoparticles concentrations. The results of pressure sensor showed that the electrical resistance of (PMMA-PbO2) nanocomposites decreases with increase in pressure.
Fabrication and studying the dielectric properties of (polystyrene-copper oxide) nanocomposites for piezoelectric application
Dalal Hassan;
Ahmed Hashim Ah-yasari
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v8i1.1019
The preparation of (polystyrene-copper oxide) nanocomposites have been investigated for piezoelectric application. The copper oxide nanoparticles were added to polystyrene by different concentrations are (0, 4, 8 and 12) wt.%. The structural and A.C electrical properties of (PS-CuO) nanocomposites were studied. The results showed that the dielectric constant and dielectric loss of (PS-CuO) nanocomposites decrease with increase in frequency. The A.C electrical conductivity increases with increase in frequency. The dielectric constant, dielectric loss and A.C electrical conductivity of polystyrene increase with increase in copper oxide nanoparticles concentrations. The results of piezoelectric application showed that the electrical resistance of (PS-CuO) nanocomposites decreases with increase in pressure.
Performance analysis of low-complexity welch power spectral density for automatic frequency analyser
Teh Yi Jun;
Asral Bahari Jambek;
Uda Hashim
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v8i1.1393
The aim of this paper is to investigate the performance of the Low Complexity Welch Power Spectral Density Computation (PSDC). This algorithm is an improvement from Welch PSDC method to reduce the computational complexity of the method. The effect of the sampling rate and the input frequency toward to accuracy of frequency detection is being evaluated. From the experiment results, sampling rate nearest to the twice of the input frequency provides the highest accuracy which achieved 99%. The ability of the algorithm to perform complex signal also has been investigated.
Design and implementation of microstrip rotman lens for ISM band applications
Mohammed K. Al-Obaidi;
Ezri Mohd;
Noorsaliza Abdullah;
Samsul Haimi Dahlan;
Jawad Ali
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v8i1.1392
This work presents the design and implementation of Rotman lens as a beam steering device for Industrial, Scientific, and Medical (ISM) applications. 2.45 GHz is considered as a center frequency design with (2-6) GHz frequency bandwidth. The beam steering is examined to cover ±21o scan angle with maximum main lobe magnitude 10.1 dBi, rectangular patch antennas are used as radiation elements to beam the output far field. The work is extended to compare between the tapered line which is used for matching between 50-Ω ports and lens cavity. CST microwave simulation studio results show that the rectangular taper line can yield 2 dB return loss less than linear taper line with a little bit shifting in responses for same input and load impedance.
Effect of substrate placement in schott vial to hematite properties
Wan Rosmaria Wan Ahmad;
M. H. Mamat;
A. S. Zoolfakar;
Z. Khusaimi;
A. S. Ismail;
T. N. T. Yaakub;
M. Rusop
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v8i1.1391
In the present study, hematite (α-Fe2O3) nanostructures were deposited on fluorine doped tin oxide (FTO) coated glass substrate using sonicated immersion synthesis method. The effect of FTO glass substrate placement in Schott vial during immersion process was studied on the growth of the hematite nanostructure and its properties. XRD pattern has revealed seven diffraction peaks of α-Fe2O3 for both hematite nanostructures samples attributed to polycrystalline with rhombohedral lattice structure. The surface morphologies from FESEM have shown that the hematite nanostructures were grown uniformly in both samples with FTO conductive layer facing up and down. Hematite sample with FTO facing down exhibits a smaller size of nanorod, 26.7 nm average diameter, compared to the hematite sample that FTO face up with 53.8nm average diameter. Optical properties revealed higher transmittance in the sample with FTO facing down, probably due to smaller size of nanostructure. The optical band gap energy plotted and extrapolated at 2.50eV and 2.55eV for FTO face up and FTO face down hematite samples respectively, presenting the sample with FTO face up has a lower optical bandgap energy.
A low quiescent current low dropout voltage regulator with self-compensation
Chu-Liang Lee;
Roslina Mohd Sidek;
Nasri Sulaiman;
Fakhrul Zaman Rokhani
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v8i1.1385
This paper proposed a low quiescent current low-dropout voltage regulator (LDO) with self-compensation loop stability. This LDO is designed for Silicon-on-Chip (SoC) application without off-chip compensation capacitor. Worst case loop stability phenomenon happen when LDO output load current (Iload) is zero. The second pole frequency decreased tremendously towards unity-gain frequency (UGF) and compromise loop stability. To prevent this, additional current is needed to keep the output in low impedance in order to maintain second pole frequency. As Iload slowly increases, the unneeded additional current can be further reduced. This paper presents a circuit which performed self-reduction on this current by sensing the Iload. On top of that, a self-compensation circuit technique is proposed where loop stability is selfattained when Iload reduced below 100μA. In this technique, unity-gain frequency (UGF) will be decreaed and move away from second pole in order to attain loop stability. The decreased of UGF is done by reducing the total gain while maintaining the dominant pole frequency. This technique has also further reduced the total quiescent current and improved the LDO’s efficiency. The proposed LDO exhibits low quiescent current 9.4μA and 17.7μA, at Iload zero and full load 100mA respectively. The supply voltage for this LDO is 1.2V with 200mV drop-out voltage. The design is validated using 0.13μm CMOS process technology.
Low insertion loss of surface mount device low pass filter at 700 MHz
Khairil Anuar Khairi;
Mohd Faizal Jamlos;
Surentiran Padmanathan;
Mohd Aminudin Jamlos;
Muammar Mohamad Isa
Bulletin of Electrical Engineering and Informatics Vol 8, No 2: June 2019
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v8i2.1386
The paper involved with the design, simulation and fabrication of 6th order elliptical-based Surface Mount Device (SMD) LPF with cutoff frequency at 700 MHz. Fabricated LPF is consisted of four PCB layers which components of SMD are soldered on the top layer. Another three layers is for grounding and shielding, power supply and grounding void. The four layers is crucial to avoid interference between components. The research has find out that the momentum simulation is definitely required to improve the signals response compared to a normal simulation by ADS software. The comparison between momentum simulated versus measured and normal simulated versus measured is 0.2 dB and 29 dB correspondingly. Such huge difference leads to conclusion that momentum simulation is saving time without having much struggles and efforts to get optimum readings. The Proposed SMD LPF has a very low insertion loss of 0.965dB with a transition region of 195 MHz which is good steepness to avoid any image frequency.
Effective and efficient network anomaly detection system using machine learning algorithm
Mukrimah Nawir;
Amiza Amir;
Naimah Yaakob;
Ong Bi Lynn
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v8i1.1387
Network anomaly detection system enables to monitor computer network that behaves differently from the network protocol and it is many implemented in various domains. Yet, the problem arises where different application domains have different defining anomalies in their environment. These make a difficulty to choose the best algorithms that suit and fulfill the requirements of certain domains and it is not straightforward. Additionally, the issue of centralization that cause fatal destruction of network system when powerful malicious code injects in the system. Therefore, in this paper we want to conduct experiment using supervised Machine Learning (ML) for network anomaly detection system that low communication cost and network bandwidth minimized by using UNSW-NB15 dataset to compare their performance in term of their accuracy (effective) and processing time (efficient) for a classifier to build a model. Supervised machine learning taking account the important features by labelling it from the datasets. The best machine learning algorithm for network dataset is AODE with a comparable accuracy is 97.26% and time taken approximately 7 seconds. Also, distributed algorithm solves the issue of centralization with the accuracy and processing time still a considerable compared to a centralized algorithm even though a little drop of the accuracy and a bit longer time needed.
Performance comparison of automatic peak detection for signal analyser
Teh Yi Jun;
Asral Bahari Jambek;
Uda Hashim
Bulletin of Electrical Engineering and Informatics Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v8i1.1394
The aim of this paper is to propose a new peak detection method for a portable device, which know as modified automatic threshold peak detection (M-ATPD). M-ATPD evolves out of ATPD with a focus on reducing computational time. The proposed method replaces the clustering threshold calculation in ATPD with a standard deviation threshold calculation. M-ATPD reduces computational time by 2 times faster compared to ATPD for control signal and 8.65 times faster compared to ATPD for raw biosignals. Modified ATPD also shows a slight improvement in terms of detection error, with a decrease of about 6.66% to 13.33% in peak detection of noise signals. Modified ATPD successfully fixes the error of peak detection on pulse control signals associated with ATPD. For raw biosignals, in total M-ATPD achieved 19.41% lower detection error compare to ATPD.
Task mapping and routing optimization for hard real-time Networks-on-Chip
M. Norazizi Sham Mohd Sayuti;
Farida Hazwani Mohd Ridzuan;
Zul Hilmi Abdullah
Bulletin of Electrical Engineering and Informatics Vol 8, No 2: June 2019
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/eei.v8i2.1395
Interference from high priority tasks and messages in a hard real-time Networks-on-Chip (NoC) create computation and communication delays. As the delays increase in number, maintaining the system’s schedulability become difficult. In order to overcome the problem, one way is to reduce interference in the NoC by changing task mapping and network routing. Some population-based heuristics evaluate the worst-case response times of tasks and messages based on the schedulability analysis, but requires a significant amount of optimization time to complete due to the complexity of the evaluation function. In this paper, we propose an optimization technique that explore both parameters simultaneously with the aim to meet the schedulability of the system, hence reducing the optimization time. One of the advantages from our approach is the unrepeated call to the evaluation function, which is unaddressed in the heuristics that configure design parameters in stages. The results show that a schedulable configuration can be found from the large design space.