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All Journal JURNAL INTEGRASI Jurnal Teknologi dan Riset Terapan (JATRA) Journal of Applied Electrical Engineering
Nur Sakinah Asaad
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Aerospace Engineering Computer Science & IT Control & Systems Engineering Electrical & Electronics Engineering Engineering Mechanical Engineering Other

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Desain Sistem Functional Test RFID Chips Array untuk Proses Manufaktur Smart Card pada TFME Politeknik Negeri Batam Nanta Fakih Prebianto; Nur Sakinah Asaad; Riki Ria
Journal of Applied Electrical Engineering Vol 4 No 2 (2020): JAEE, December 2020
Publisher : Politeknik Negeri Batam

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.30871/jaee.v4i2.2743

Abstract

Proses pengembangan dan produksi smart card dilakukan pada Teaching Factory Manufacturing of Electronics (TFME) Politeknik Negeri Batam. Pada proses produksi smart card perlu dikembangkan sistem pengujian sample untuk memastikan hasil wiring dan proses die attach berhasil yang ditandai dengan komunikasi antara chip dan RFID reader (13,56 MHz). Pendekatan yang dilakukan adalah merancang sistem uji fungsi RFID otomatis dengan memanfaatkan pergerakan tiga axis dan mini probe yang melekat pada pad sambungan wire bond dan die. Metode yang digunakan pada penelitian ini terdiri dari perancangan mekanik, perancangan elektrik, perancangan perangkat lunak, dan pengujian sistem. Resistansi probe RFID memiliki resistansi 1,8 Ohm. Pergerakan setiap axis menggunakan motor stepper yang dikopling dengan ulir linear T8 2pitch 4star. Torsi yang terukur pada axis x, y, dan z adalah 4.64 N.mm, 59,54 N.mm, dan 10,72 N.mm pada saat stepper bergerak maju.
MODIFIKASI MESIN TRIM FORM PADA PROSES PENGEMASAN INTEGRATED CIRCUIT UNTUK PENURUNAN DAMAGED LEAD Nur Sakinah Asaad; Purwanto Purwanto
JURNAL INTEGRASI Vol 12 No 1 (2020): Jurnal Integrasi - April 2020
Publisher : Politeknik Negeri Batam

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1025.963 KB) | DOI: 10.30871/ji.v12i1.1889

Abstract

Integrated circuit (IC) packaging process of Low Profile Quad Flat Package (LQFP) needs trim form machine for trimming the dambar and forming the IC leads before separated from the lead frame. One of the process sequences in trim form machine is offload, placement of IC units in the tray by pick and place module including open and close of turn table movement to adjust space between lead frame columns before transferred to tray. Open and close movement of the turn table impact to damaged lead production defect. Modification intended to misalignment earlier detection so that the machine can stop automatically and decrease production defect by adding two proximity sensor on turn table. Based on the result of this research, the error on turn table could be reduced to 88% with assembly yield achieved 99.985% or increase up to 0.07%.
DESIGN OF EXPERIMENT (DOE) LIQUID PHOTOIMAGEABLE SOLDER MASKS PCB PADA TEACHING FACTORY MANUFACTURING OF ELECTRONICS (TFME) POLITEKNIK NEGERI BATAM Nadhrah Wivanius; Nur Sakinah Asaad; Heru Wijanarko; Ira Zamzami
JURNAL INTEGRASI Vol 12 No 1 (2020): Jurnal Integrasi - April 2020
Publisher : Politeknik Negeri Batam

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (788.177 KB) | DOI: 10.30871/ji.v12i1.1987

Abstract

This paper examines several variables to formulated the best parameters in the PCB manufacturing process. This study was implements a PCB with a screen printing process that uses the LPISM (Liquid Photoimageable Solder Mask) application. Where in the process PCB coating is done by connecting the amount of solder liquid mask in one coating using the right parameters using the Design of Experiment (DoE) method. This DoE method improves the quality of the PCB at the lowest possible cost. DoE on LPISM applied at the Teaching Factory Manufaktur Elektronika Politeknik Negeri Batam with the aim of protecting the PCB lines from being connected to one another, providing the right measurements, and using the use of laminated mask solder. Thus, Politeknik Negeri Batam Teaching Factory laboratory assistants can produce PCBs using the LPISM method with quality according to standards. From the analysis, obtained an appropriate angle for screen printing is between 150-200 so that the screen is not damaged. In addition, the oven process can thin the solder mask up to 70-80%. In accordance with the results of comprehensive testing, the 24th data obtained can be recommended because it fulfill the IPC-SM-840C standard, with the 2.5 μm solder mask thickness.
Design of Experiment pada proses Immersion Tin Plating Widya Rika Puspita; Lindawani Siregar; Ika Karlina Laila NS; Ira Zamzami; Budiana Budiana; Fitriyanti Nakul; Nur Sakinah Asaad; Adlian Jefiza
JURNAL INTEGRASI Vol 14 No 2 (2022): Jurnal Integrasi - Oktober 2022
Publisher : Pusat Penelitian dan Pengabdian Masyarakat Politeknik Negeri Batam

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.30871/ji.v14i2.4035

Abstract

PCB (printed circuit board) is a copper-coated board that is a container for electronic components arranged to form electronic circuits. Copper surfaces that are easy to oxidize (corrosion) need to be soothed with a layer of Sn (tin). Based on the TFME study case, the electroplating technique requires more cost for tin plating. The immersion process of the tin plating model is superior in terms of cost and quality. To determine the right combination parameters so as to obtain a thickness that is in accordance with the IPC-4554 standard, namely a minimum of 1000 nm, the research method used is Design of Experiments (DoE). There are nine experimental combinations of the DoE results. Combination parameter testing is done using a SEM (scanning electron microscope) machine. The combination of four to nine has met IPC standards with a thickness of between 1040-1540 nm. The correct parameter is obtained by the combination of 5 with the parameter temperature of 700 and time of 60 minutes, and the result is an average thickness of 1.2 µm and has an uncertain value of the measurement is 7.
REDUCTION OF LIFTED STITCH DEFECTS IN WIRE BONDING PROCESS THROUGH ROOT CAUSE ANALYSIS Puspita, Widya Rika; Manurung, Anjunius; budiana, Budiana; Nur Sakinah Asaad; Jefiza, Adlian; Nakul, Fitriyanti; Putra, Irwanto Zarma; Diputra, Muhammad Naufal Airlangga; Illa Aryeni; Handri Toar; Anggraini, Ria
Jurnal Teknologi Dan Riset Terapan (JATRA) Vol. 7 No. 2 (2025): Jurnal Teknologi dan Riset Terapan (JATRA) - December 2025
Publisher : Politeknik Negeri Batam

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.30871/jatra.v7i2.9604

Abstract

Reliable connection inspection is crucial for the quality of semiconductor products. A frequent issue is stitch defects during wire bonding. To address this, an investigation was conducted using flow charts. Additionally, an analysis was performed by identifying root causes using the Fishbone Diagram method and the 5 Whys technique. After improvements, including targeted operator training, a significant reduction of 96.75% in stitch defects was achieved. This study demonstrates that the combination of root cause analysis methods and operator training effectively enhances the reliability of the wire bonding process and the quality of semiconductor products. This study did not account for environmental factors that might influence the wire bonding process, such as temperature and humidity variations. Therefore, the findings may be limited in settings with different environmental conditions.
Co-Authors Adlian Jefiza BUDIANA, BUDIANA Diputra, Muhammad Naufal Airlangga Fitriyanti Nakul Handri Toar Heru Wijanarko Ika Karlina Laila NS Illa Aryeni Ira Zamzami Jefiza, Adlian Lindawani Siregar Manurung, Anjunius Nadhrah Wivanius Nakul, Fitriyanti Nanta Fakih Prebianto Purwanto Purwanto Puspita, Widya Rika Putra, Irwanto Zarma RIA ANGGRAINI Riki Ria Widya Rika Puspita