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International Journal of Reconfigurable and Embedded Systems (IJRES)

IJRES
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Published by Institute of Advanced Engineering and Science

ISSN : 20894864 EISSN : 27222608 DOI : -

Core Subject : Economy,

Economics, Econometrics & Finance

The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems, ranging from audio-video-equipment, telephones, vehicles, toys, aircraft, medical diagnostics, pacemakers, climate control systems, manufacturing systems, intelligent power systems, security systems, to weapons etc. The aim of IJRES is to provide a vehicle for academics, industrial professionals, educators and policy makers working in the field to contribute and disseminate innovative and important new work on reconfigurable and embedded systems. The scope of the IJRES addresses the state of the art of all aspects of reconfigurable and embedded computing systems with emphasis on algorithms, circuits, systems, models, compilers, architectures, tools, design methodologies, test and applications.

Arjuna Subject : -

Articles 7 Documents

Search results for , issue "Vol 6, No 3: November 2017" : 7 Documents clear

Online Self-testable Multi-core System using Dynamic Partial Reconfiguration of FPGA G. Prasad Acharya; M. Asha Rani
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 6, No 3: November 2017
Publisher : Institute of Advanced Engineering and Science

This paper presents a novel and efficient method of designing an online self-testable multi-core system. Testing of a Core Under Test (CoUT) in a massively multi-core system can be carried out while the system is operational, by assigning the functionality of the CoUT to one of the non-functioning/idle and pre-tested core. The methodology presented in this paper has been implemented taking a test setup by demonstrating the Dynamic Partial Reconfiguration (DPR) feature of latest FPGAs on Zynq-7 XC702 evaluation board. The simulation results obtained from the experimental setup show that the utilization of a multi-core system can be significantly improved by effectively utilizing the idle core(s) to back up CoUT(s) for on-line test without a significant hardware overhead and test latency.

Minimizing the loses of solar power generation by designing an intelligent tracking system implemented on FPGA Alaa Hamza Omran
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 6, No 3: November 2017
Publisher : Institute of Advanced Engineering and Science

The increasing of using of an electrical power as a power source in a large number of devices can occur a serious problem in our daily life. One of the useful power sources is a solar cell which used to overcome many problems of power generation. In this paper, the solar cell model is proposed to minimize loses of solar power generation by designing of an intelligent tracking system based on FPGA. PSO algorithms are used to train the neural networks to control the speeds and the directions of rotations of two DC motors with the help of FPGA cart. The proposed system was implemented in MATLAB; and for the hardware part, FPGA was used for the implementation of neural networks.

FPGA implementation of DS-CDMA Transmitter and Receiver Harinath Mandalapu; B Murali Krishna
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 6, No 3: November 2017
Publisher : Institute of Advanced Engineering and Science

Direct sequence spread Spectrum (DSSS) is also known as direct sequence code division multiplexing. In direct sequence spread spectrum the stream of information to be transmitted is divided into small pieces each of which is allocated across to a frequency channel across the spectrum. Data signal at the point of transmission is collaborated with a higher data-rate bit sequence (also called chipping code) that divides the data according to a spreading ratio. A redundant chipping code helps the signal resist interference and also enables the original data to be recovered if data bits are damaged during the transmitting. In this project direct sequence spread spectrum principle based code division multiple access (CDMA) transmitter and receiver is implemented on SPARTAN 3E FPGA. The Xilinx synthesis technology (XST) of Xilinx ISE tool used for synthesis of transmitter and receiver on FPGA Spartan 3E.

Optimization of Resource Utilization of Fast Fourier Transform Subhash Chandra Yadav; Pradeep Juneja; R. G. Varshney
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 6, No 3: November 2017
Publisher : Institute of Advanced Engineering and Science

This paper considers the optimization of resource utilization for three FFT algorithms, as it pertains not to the input samples or output modes, but to the twiddle factors that arise in Cooley-Tukey FFT algorithms. Twiddle factors are a set of complex roots of unity, fixed by the transform order for the particular algorithm. This paper shows the comparison between three known FFT algorithms, DIT-FFT, DIF-FFT and GT algorithm. All these algorithms are implemented on FPGA (Spartan-3 XC3S4000l-4fg900) with XILINX 10.1 ISE.

ARM Controller and EEG based Drowsiness Tracking and Controlling during Driving B. Naresh; S. Rambabu; D. Khalandar Basha
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 6, No 3: November 2017
Publisher : Institute of Advanced Engineering and Science

This paper discussed about EEG-Based Drowsiness Tracking during Distracted Driving based on Brain computer interfaces (BCI). BCIs are systems that can bypass conventional channels of communication (i.e., muscles and thoughts) to provide direct communication and control between the human brain and physical devices by translating different patterns of brain activity commands through controller device in real time. With these signals from brain in mat lab signals spectrum analyzed and estimates driver concentration and meditation conditions. If there is any nearest vehicles to this vehicle a voice alert given to driver for alert. And driver going to sleep gives voice alert for driver using voice chip. And give the information about traffic signal indication using RFID. The patterns of interaction between these neurons are represented as thoughts and emotional states. According to the human feelings, this pattern will be changing which in turn produce different electrical waves. A muscle contraction will also generate a unique electrical signal. All these electrical waves will be sensed by the brain wave sensor and it will convert the data into packets and transmit through Bluetooth medium. Level analyzer unit (LAU) is used to receive the raw data from brain wave sensor and it is used to extract and process the signal using Mat lab platform. The nearest vehicles information is information is taken through ultrasonic sensors and gives voice alert. And traffic signals condition is detected through RF technology.

Metal Oxides Semiconductor Sensors for Odor Classification Nyayu Latifah Husni; Ade Silvia; Siti Nurmaini; Irsyadi Yani
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 6, No 3: November 2017
Publisher : Institute of Advanced Engineering and Science

The performance of gas sensor will differ and vary due to the surrounding environment changing, the way of implementation, and the position of the sensors to the source. To reach a good result on gas sensors implementation, a performance test on sensors is needed. The results of the tests are useful for characterizing the properties of the particular material or device. This paper discusses the performances of metal oxides semiconductor (MOS) sensors. The sensors are tested to determine the sensors' time response, sensors' peak duration, sensors' sensitivity, and sensors' stability of the sensor when applied to the various sources at different range. Three sources were used in experimental test, namely: ethanol, methanol, and acetone. The gas sensors characteristics are analyzed in open sampling method in order to see the sensors' sensitivity to the uncertainty disturbances, such as wind. The result shows that metal oxides semiconductor sensor was responsive to the 3 sources not only in static but also dynamic conditions. The expected outcome of this study is to predict the MOS sensors' performance when they are applied in robotic implementation. This performance was considered as the training datasets of the sensor for odor classification in this research. From the experiments, It was got, in dynamic experiment, the senrors has average of precision of 93.8-97%, the accuracy 93.3-96.7%, and the recall 93.3-96.7%. This values indicates that the sensors were selective to the odor they sensed.

Application of Inverse Perspective Mapping for Advanced Driver Assistance Systems in Automotive Embedded Systems Vighnesh N.T; Rachana Anil; Rohith Kumar D; Sanjana Sharvana; Rajeshwari Hegde; B S Nagabhushana
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 6, No 3: November 2017
Publisher : Institute of Advanced Engineering and Science

In the recent times vehicle manufactures and automotive suppliers are progressing towards building vision based subsystems for provisioning driver assistance while targeting the automotive safety critical needs. While the acquired images constitute the fundamental input for any vision based system, transforms on images become essential to derive and gain insight into certain specific features. These derived features are used and reused at multiple places for varied automotive applications. This situation warrants a scalable and flexible image processing platform for a class of automotive applications. An attempt is made in this Research work to propose architecture that, specially, includes a layer of image transformations and to implement a prototype image processing platform. Inverse Perspective Mapping (IPM), a widely used class of transforms is emphasized in the present architecture alongside other nominal transforms. Lane departure warning system is implemented on this platform for the purpose of illustration and to analyze the effectiveness of the proposed architecture

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