International Journal of Reconfigurable and Embedded Systems (IJRES)
The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems, ranging from audio-video-equipment, telephones, vehicles, toys, aircraft, medical diagnostics, pacemakers, climate control systems, manufacturing systems, intelligent power systems, security systems, to weapons etc. The aim of IJRES is to provide a vehicle for academics, industrial professionals, educators and policy makers working in the field to contribute and disseminate innovative and important new work on reconfigurable and embedded systems. The scope of the IJRES addresses the state of the art of all aspects of reconfigurable and embedded computing systems with emphasis on algorithms, circuits, systems, models, compilers, architectures, tools, design methodologies, test and applications.
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6 Transistors and 1 memristor based memory cell
Kazi Fatima Sharif;
Satyendra N. Biswas
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijres.v9.i1.pp42-51
Area efficient and stable memory design is one of the most important tasks in designing system on chip. This research concentrates in designing a new type of hybrid memory model by using only nMOS transistors and memristor. The proposed memory cell is very stable during successive read operates and comparatively faster and also occupies less amount of silicon area. The stability of the data during successive read operation and noise margin are in the promising range. Extensive simulation results using LTspice and Cadence software tools demonstrate the validity and competency of the proposed model.
A compact model of transconductance and drain conductance for DMG-GC-DOT cylindrical gate MOSFET
Hind Jaafar;
Abdellah Aouaj;
Benjamin Iñiguez;
Ahmed Bouziane
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijres.v9.i1.pp34-41
A compact model for dual-material gate graded-channel and dual-oxide thickness with two dielectric constant different cylindrical gate (DMG-GC-DOTTDCD) MOSFET was investigated in terms of transconductance, drain conductance and capacitance. Short channel effects are modeled with simple expressions, and incorporated into the core of the model (at the drain current). The design effectiveness of DMG-GC-DOTTDCD was monitored in comparing with the DMG-GC-DOT transistor, the effect of variations of technology parameters, was presented in terms of gate polarization and drain polarization. The results indicate that the DMG-GC-DOTTDCD devices have characteristics higher than the DMG-GC-DOT MOSFET. To validate the proposed model, we used the results obtained from the simulation of the device with the SILVACO-ATLAS-TCAD software.
Two state-of-the-arts current-mode ternary full adders based on CNTFET Technology
Mona Moradi
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijres.v9.i1.pp19-27
Adder core respecting to its various applications in VLSI circuits and systems is considered as the most critical building block in microprocessors, digital signal processors and arithmetic operations. Novel designs of a low power and complexity Current Mode 1-bit Full Adder cell based on CNTFET technology has been presented in this paper. Three major parts construct their structures; 1) the first part that converts current to voltage; 2) threshold detectors (TD); and 3) parallel paths to convey the output currents flow. Adjusting threshold voltages which are significant factor for setting threshold detectors switching point has been achieved by means of CNTFET technology. It would bring significant improvements in adjusting threshold voltages, regarding to its unique characterizations. Simple design, less transistor counts and static power dissipation and better performance comparing previous designs could be considered as some advantages of the novel designs.
Application of optimal artificial intelligence based tuned controllers to a class of embedded nonlinear power system
Magdy A. S. Aboelela
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijres.v9.i1.pp83-92
This paper studies the implementation of the Bat Inspired Algorithm (BIA) as an optimization technique to find the optimal parameters of two classes of controllers. The first is the classical Proportional-Integral-Derivative (PID). The second is the hybrid fractional order and Brain Emotional Intelligent controller. The two controllers have been implemented, separately, for the load frequency control of a single area electric power system with three physical imbedded nonlinearities. The first nonlinearity represents the generation’s rate constraint (GRC). The second is owing to the governor dead band (GDB). The last is due to the time delay imposed by the governor-turbine link, the thermodynamic process, and the communication channels. These nonlinearities have been embedded in the simulation model of the system under study. Matlab/Simulink software has been applied to obtain the results of applying the two classes of controllers which have been, optimally, tuned using the BIA. The Integral of Square Error (ISE) criterion has been selected as an element of the objective function along with the percentage overshoot and settling time for the optimum tuning technique of the two controllers. The simulation results show that when using the hybrid fractional order and Brain Emotional Intelligent controller, it gives better response and performance indices than the conventional Proportional-Integral-Derivative (PID) controllers.
Low power 11T adder comparator design
C.M.R. Prabhu;
Tan Wee Xin Wilson;
T. Bhuvaneswari
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijres.v9.i1.pp28-33
Comparator is a basic arithmetic component in a digital system and adders are the basic block of processor unit, the performance of adder will improve the system performance. The proposed 11T adder comparator is consists of three main components, namely XOR, inverter, and MUX logic. The circuit is designed and implemented based on top-down approach with 11 transistors. The proposed cell can be used at higher temperature with minimal power loss. It also gives faster response for the carry output. The proposed comparator circuit shows 63.80% improvement in power consumption than other circuits.
A compact graphene based nano-antenna for communication in nano-network
M. Saravanan;
V.R. Prakash
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijres.v9.i1.pp12-18
Due to recent advances in nanotechnology, the use of nano-devices and its network becomes more popular in the field of medical, commercial and military applications. One of the major issues in designing nano-network is miniaturization of nano-devices which are limited due to communication antenna used in that device and its power constraints. At 1000nm size, an antenna resonates at around 100 THz which suffers from greater propagation loss and provides signal coverage of micrometer distances. Hence there is a need for nano-antenna with reduced size and also operating at mid infrared frequencies to provide a good signal coverage. In this paper, graphene-based nano-antenna is presented. The model resonates at 55THz frequency with a peak gain of 5.47 dB in the propagation direction. The model exploits the principle of surface plasma polarition waves for miniaturization and achieves 50% size reduction when compared to conventional nano-antenna and best suitable for nano-network communications.
Filtering and acquisition of serial data frames using xilinx system generator
Adrián Gonzalo Stacul
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijres.v9.i1.pp1-11
The main purpose of this paper is the design, development and implementation of a PCM bit-synchronizer based on a System Generator and Simulink model. The entire system will be applied to a ground station with an ad-hoc telemetric data acquisition system to be applied in UAV monitoring and sounding rockets. Based on this information, the ground station will compute the platform trajectories, velocities and attitudes.
Application of carbon nanotubes (CNT) on the computer science and electrical engineering: A review
Hossein Kardan Moghaddam;
Mohamad Reza Maraki;
Amir Rajaei
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijres.v9.i1.pp61-82
In recent years, dimensions and sizes of components and parts in the computer and electronic industries have been steadily reducing, as they are now considered very tiny tools and there is always a need to store and process information stronger. Nanotubes have poor magnetic properties. If nanotubes are covered by ferromagnetic nanoparticles, their magnetic properties can be improved and they can be used in the manufacture of nanoelectronic devices in the computer and electronic industries. In addition to reviewing the structure and properties of materials made using different nanomaterials for use in the computer and electronic industries, the present paper aimed to study different applications of nanomaterials, especially carbon nanotubes, in the manufacture of electronic devices. The present study showed that the corporation of nanomaterials into electronic devices is a promising approach for future applications which can revolutionize the computer industry.
Surface potential modeling of dual metal gate-graded channel-dual oxide thickness with two dielectric constant different of surrounding gate MOSFET
Hind Jaafar;
Abdellah Aouaj;
A. Bouziane;
Benjamin Iñiguez
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijres.v9.i1.pp52-60
An Analytical study for the surface potential, threshold voltage and Subthreshold swing (SS) of Dual-metal Gate Graded channel and Dual Oxide Thickness with two dielectric constant different cylindrical gate surrounding-gate (DMG-GC-DOTTDCD) metal–oxide–semiconductor field-effect transistors (MOSFETs) is proposed to investigate short-channel effects (SCEs). The performance of the modified structure was studied by developing physics-based analytical models for the surface potential, threshold voltage shift, and Subthreshold swing. It is shown that the novel MOSFET could significantly reduce threshold voltage shift and Subthreshold swing, can also provides improved electron transport and reduced short channel effects (SCE). Results reveal that the DMG-GC-DOTTDCD devices with different dielectric constant offer superior characteristics as compared to DMG-GC-DOT devices. The derived analytical models agree well with simulation by ATLAS.