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All Journal International Journal of Electrical and Computer Engineering IAES International Journal of Artificial Intelligence (IJ-AI) Majalah Ilmiah Teknologi Elektro Mechatronics, Electrical Power, and Vehicular Technology Jurnal INKOM Jurnal Simetris TELKOMNIKA (Telecommunication Computing Electronics and Control) Bulletin of Electrical Engineering and Informatics Bulletin of Electrical Engineering and Informatics Journal of ICT Research and Applications Setrum : Sistem Kendali-Tenaga-elektronika-telekomunikasi-komputer ELINVO (Electronics, Informatics, and Vocational Education) JURNAL NASIONAL TEKNIK ELEKTRO Bulletin of Electrical Engineering and Informatics Proceeding of the Electrical Engineering Computer Science and Informatics International Journal of Supply Chain Management Indonesian Journal of Electrical Engineering and Computer Science Community Empowerment Jurnal Nasional Teknik Elektro dan Teknologi Informasi Jurnal Ilmiah Teknik Elektro Jurnal INFOTEL Majalah Ilmiah Teknologi Elektro

Trio Adiono

Institut Teknologi Bandung

Author-ID : 445489

Arts Humanities Computer Science & IT Control & Systems Engineering Decision Sciences, Operations Research & Management Education Electrical & Electronics Engineering Energy Engineering Environmental Science Industrial & Manufacturing Engineering Public Health Social Sciences Transportation

Published : 43 Documents Claim Missing Document

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Rapid Prototyping Methodology of Lightweight Electronic Drivers for Smart Home Appliances Trio Adiono; Rachmad Vidya Wicaksana Putra; Maulana Yusuf Fathany; Braham Lawas Lawu; Khilda Afifah; Muhammad Husni Santriaji; Syifaul Fuada
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 5: October 2016
Publisher : Institute of Advanced Engineering and Science

Many researches have been conducted in smart home topic. Mostly, they discussed on the specific aspect of application. On the other side, many applications still can be explored and attached into the system. Several main challenges in designing the application devices are system complexity, reliability, user friendliness, portability, and low power consumption. Thus, design of electronic driver is one of the key elements for overcoming these challenges. Moreover, the drivers have to comply the rules of smart home system, data protocol, and application purpose. Hence, we propose a rapid prototyping methodology on designing lightweight electronic drivers for smart home appliances. This methodology consists of three main aspects, namely smart home system understanding, circuitry concept, and programming concept. By using this method, functional and lightweight drivers can be achieved quickly without major changes and modifications in home electrical system. They can be remotely controlled and monitored anytime and from anywhere. For prototyping, we design several drivers to represent common electronic and mechanical based applications. Experimental results prove that the proposed design methodology can achieve the research target.

Noise Analysis of Trans-impedance Amplifier (TIA) in Variety Op Amp for use in Visible Light Communication (VLC) System Syifaul Fuada; Angga Pratama Putra; Yulian Aska; Trio Adiono
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

VLC is a complex system with lots of challenges in its implementation. One of its problems is noise that originated from internal and external sources (sunlight, artificial light, etc). Internal noise is originated from active components of analog front-end (AFE) circuit, which will be discussed in this paper, especially on the trans-impedance amplifier (TIA) domain. The noise characteristics of AFE circuit in VLC system has been analyzed using the variety of available commercial Op Amp and different types of the photodiode (Si, Si-PIN, Si APD). The approach of this research is based on analytical calculus and simulation using MATLAB®. The results of this research show that the main factor that affecting the noise is en, the feedback resistor (Rf), and junction capacitor in the photodiode (Cj). Besides that, the design concept of multi channel TIA (8 channel) using IC Op Amp, with consideration of pin number of each Op Amp, supply needs, the initial value of Rf, converter to 8-DIP and feedback capacitor (Cf) channel, also discussed in this paper.

Reversed-Trellis Tail-Biting Convolutional Code (RT-TBCC) Decoder Architecture Design for LTE Trio Adiono; Ahmad Zaky Ramdani; Rachmad Vidya Wicaksana Putra
International Journal of Electrical and Computer Engineering (IJECE) Vol 8, No 1: February 2018
Publisher : Institute of Advanced Engineering and Science

Tail-biting convolutional codes (TBCC) have been extensively applied in communication systems. This method is implemented by replacing the fixed-tail with tail-biting data. This concept is needed to achieve an effective decoding computation. Unfortunately, it makes the decoding computation becomes more complex. Hence, several algorithms have been developed to overcome this issue in which most of them are implemented iteratively with uncertain number of iteration. In this paper, we propose a VLSI architecture to implement our proposed reversed-trellis TBCC (RT-TBCC) algorithm. This algorithm is designed by modifying direct-terminating maximum-likelihood (ML) decoding process to achieve better correction rate. The purpose is to offer an alternative solution for tail-biting convolutional code decoding process with less number of computation compared to the existing solution. The proposed architecture has been evaluated for LTE standard and it significantly reduces the computational time and resources compared to the existing direct-terminating ML decoder. For evaluations on functionality and Bit Error Rate (BER) analysis, several simulations, System-on-Chip (SoC) implementation and synthesis in FPGA are performed.

An SoC Architecture for Real-Time Noise Cancellation System Using Variable Speech PDF Method Trio Adiono; Aditya F. Ardyanto; Nur Ahmadi; Idham Hafizh; Septian G. P. Putra
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 6: December 2015
Publisher : Institute of Advanced Engineering and Science

This paper presents the architecture and implementation of system-on-chip (SoC) for realtime noise cancellation system which exploits variable speech probability density function (PDF) and maximum a posteriori (MAP) estimation rule as noise cancelling algorithm. The hardware software co-design approach is employed to achieve real-time performance while considering ease of implementation and design flexibility. The software module utilizes LEON SPARC-v8 and FPU co-prosessor as processing unit. The AMBA based Hanning Filter and FFT/IFFT are utilized as processing accelerator modules to increase system performance. The FFT/IFFT module employs custom Radix-2^2 Single Delay Feedback (R2^2SDF). In order to deliver high data transfer rate between buffer and hardware accelerators, the DMA controller is incorporated. The overall system implementation utilizes 18,500 logic elements and consumes 21.87 kB of memory. The system takes only 0.69 ms latency which is appropriate for real-time application. An FPGA Altera DE2-70 is used for prototyping with both algorithms and the noise cancellation function have been verified.

Co-Authors Abdurrahman, Imran Adang Suwandi Ahmad Adijarto, Waskita Adinugraha, Erick Aditia Rifai Aditya F. Ardyanto Afandi, Najma Khansa Alya Agung, Anton Toni Agung, Anton Toni Ahmad Zaky Ramdani Alfi, Feiza Angga Pradana Angga Pradana Angga Pradana Angga Pratama Putra Angga Pratama Putra Angga Pratama Putra Angga Pratama Putra Angga Pratama Putra, Angga Pratama Arwin Datumaya Wahyudi Sumari Bambang Riyanto Trilaksono Braham Lawas Lawu Catherine Olivia Sereati Dawani, Febri Erick Adinugraha Erwin Setiawan Erwin Setiawan Erwin Setiawan, Erwin Fadjar Rahino Triputra Fadjar Rahino Triputra, Fadjar Rahino Farkhad Ihsan Hariadi Fathany, Maulana Yusuf Guno, Yomi Hans G. Kerkhoff Hans Kasan Hans Kasan Hariadi, Farkhad Ihsan Haslina Arshad Hidayat, Asyaraf Hiroaki Kunieda Idham Hafizh Imran Abdurrahman Infall Syafalni Irfan Gani Purwanda Joko Suryana Kasan, Hans Khilda Afifah Leonardi Paris Hasugian Maulana Yusuf Fathany Maulana Yusuf Fathany Maulana Yusuf Fathany Mohamad Dahsyat Mohamad Dahsyat, Mohamad Muhammad Arif Sulaiman Muhammad Husni Santriaji Nur Afyfah Suwadi Nur Ahmadi Nur Ahmadi Nurfitri Anbarsanti Octaviany, Siti Vivi Pamungkas, Sandi Purwanda, Irfan Gani Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rachmad Vidya Wicaksana Putra Rella Mareta Rianto Adhy Sasongko Rianto Adhy Sasongko, Rianto Adhy Rifai, Aditia Ruzzakiah Jenal Septian G. P. Putra Sinantya Feranti Anindya SINANTYA FERANTI ANINDYA, SINANTYA FERANTI Suksmandhira Harimurti Sulaiman, Muhammad Arif Syifaul Fuada Waskita Adijarto Yulian Aska Yulian Aska Yulian Aska Yulian Aska Yulian Aska, Yulian Zainal Rasyid Mahayuddin

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