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International Journal of Reconfigurable and Embedded Systems (IJRES)

IJRES
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Published by Institute of Advanced Engineering and Science

ISSN : 20894864 EISSN : 27222608 DOI : -

Core Subject : Economy,

Economics, Econometrics & Finance

The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems, ranging from audio-video-equipment, telephones, vehicles, toys, aircraft, medical diagnostics, pacemakers, climate control systems, manufacturing systems, intelligent power systems, security systems, to weapons etc. The aim of IJRES is to provide a vehicle for academics, industrial professionals, educators and policy makers working in the field to contribute and disseminate innovative and important new work on reconfigurable and embedded systems. The scope of the IJRES addresses the state of the art of all aspects of reconfigurable and embedded computing systems with emphasis on algorithms, circuits, systems, models, compilers, architectures, tools, design methodologies, test and applications.

Arjuna Subject : -

Articles 456 Documents

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Design of active inductor-based butterworth and chebyshev microwave bandpass filters in standard 0.18µm-CMOS technology Jarjar Mariem; Pr. EL Quazzani Nabih
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science

In this paper we propose a synthesis of microwave active filters having Butterworth and Chebyshev responses in the frequency range 1GHz-2GHz. The filter fundamental block, used to build an active inductor, consists of CMOS-based Operational Transconductance Amplifier (OTA) circuits. These amplifiers are made out of simple current mirror using MOS transistors. The simulation procedure has been carried out through PSPICE software showing good performances regarding scattering parameters in terms insertion losses, of out-of-band rejection and phase.

Real-Time Algorithms and Architectures for several user Channel Detection in Wireless Base Station Receivers Nitish Meena; Nilesh Parihar
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 4, No 2: July 2015
Publisher : Institute of Advanced Engineering and Science

In this paper presents algorithms and architecture designs that can meet real-time requirements of for several user channel estimation and detection in code-division multiple-access-based wireless base-station receivers. Entangled algorithms proposed to implement several user channel assessment and demodulation make their real-time execution difficult on current digital signal processor-based receivers. A based several user channel assessment scheme requiring matrix conversion is draft again from an demodulation perspective for a reduced intricacy, repetitive scheme with a simple fixed-point very large scale integration architecture. A reduced-intricacy, bit-streaming several user demodulation algorithm that avoids the need for demodulation is also developed for a simple, pipelined VLSI architecture. Thus, we develop real-time solutions for several user channel assessment and demodulation for third-generation wireless systems by: 1) designing the algorithms from a fixed-point execution perspective, without significant loss in error rate performance; 2) task partitioning; and 3) designing bit-streaming fixed-point VLSI architectures that explore pipelining, correspondence, and bit-level computations to achieve real-time with minimum area overhead.

Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FPGA processor R. Palanisamy; K. Vijayakumar
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 8, No 2: July 2019
Publisher : Institute of Advanced Engineering and Science

This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse generated using matlab.

Hardware Implementation of 3-level Inverter using Microcontroller for Single Phase Induction Motor Veena B.M.; Parimala S.K.
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 5, No 2: July 2016
Publisher : Institute of Advanced Engineering and Science

The conventional two level inverter has many limitations for high voltage & high power applications. The term multilevel began with the three-level inverter. Subsequently, several multilevel inverter topologies have been developed. However, the elementary concept of a multilevel inverter to achieve higher power is to use a series of power semiconductor switches with several lower voltage dc sources to perform the power conversion by synthesizing a staircase voltage waveform. Output voltage of 3 level inverter consists of 3 levels, which results smoother output. And hence the THD will be reduced. In this paper Simulink of 3 level inverter and the hardware implementation of micro controller based control of multilevel inverter for single phase Induction motor are presented.

Filtering and acquisition of serial data frames using xilinx system generator Adrián Gonzalo Stacul
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science

The main purpose of this paper is the design, development and implementation of a PCM bit-synchronizer based on a System Generator and Simulink model. The entire system will be applied to a ground station with an ad-hoc telemetric data acquisition system to be applied in UAV monitoring and sounding rockets. Based on this information, the ground station will compute the platform trajectories, velocities and attitudes.

Application of carbon nanotubes (CNT) on the computer science and electrical engineering: A review Hossein Kardan Moghaddam; Mohamad Reza Maraki; Amir Rajaei
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 9, No 1: March 2020
Publisher : Institute of Advanced Engineering and Science

In recent years, dimensions and sizes of components and parts in the computer and electronic industries have been steadily reducing, as they are now considered very tiny tools and there is always a need to store and process information stronger. Nanotubes have poor magnetic properties. If nanotubes are covered by ferromagnetic nanoparticles, their magnetic properties can be improved and they can be used in the manufacture of nanoelectronic devices in the computer and electronic industries. In addition to reviewing the structure and properties of materials made using different nanomaterials for use in the computer and electronic industries, the present paper aimed to study different applications of nanomaterials, especially carbon nanotubes, in the manufacture of electronic devices. The present study showed that the corporation of nanomaterials into electronic devices is a promising approach for future applications which can revolutionize the computer industry.

Effectual SVPWM Techniques and Implementation of FPGA Based Induction Motor Drive Saravanan M; Nandakumar R; Veerabalaji G
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 1, No 1: March 2012
Publisher : Institute of Advanced Engineering and Science

This paper presents a field programmable gate array(FPGA)-based control integrated circuits(IC) for controlling the pulsewidth modulation (PWM) inverter used in power conditioning system for ac-voltage regulation. Space vector pulsewidth modulation(SVPWM) algorithm offers great flexibility to optimise switching waveform. Among them,double edge triggering can be implemented, It consumes less power compare to other PWM techniques. The SVPWM pulses thus generated through Xilinx is given as switching pulses to voltage source inverter(VSI) circuit to trigger the motor. The delay time of PWM output is programmable and SVPWM control IC is reprogrammable.It shows the advantage of lower total harmonic distortion(THD) without increasing the switching losses. Results are provided along with simulation analysis in terms of THD,output fundamental voltage and voltage transfer ratio to verify the feasibility of operation. The SVPWM switching pattern has been achieved with a fundamental frequency of 50HZ.

On-chip AMBA Bus Based Efficient Bridge between High Performance and Low Peripheral Devices Anurag Shrivastava; Sudhir Kumar Sharma
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 6, No 1: March 2017
Publisher : Institute of Advanced Engineering and Science

Today’s scenario of SOC deals with integrity and sharing of information or data with various level of communication. AMBA bus protocol has been proposed by ARM community to justify the uneven demand of integrity .In this paper functional description and implementation of high peripheral devices supporting protocol AXI2.0 and its interface between low peripheral devices has been proposed. The connection named as bridge take care of the protocol mismatch and operates on data transfer for uneven speed demand. Asynchronous FIFO has been considered to avoid the complex handshaking mechanism. The design has been implemented within VHDL and implemented on Xilinx Virtex 4.

Optimization and Implementation of Reversible BCD Adder in Terms of Number of Lines P.Radhika Ramya; Y.Sudha Vani
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 2, No 1: March 2013
Publisher : Institute of Advanced Engineering and Science

The Reversible logic plays an important role to obtain the minimal energy dissipation. It is the main requirement in the low power digital design. To implement a reversible function some additional lines are required. Sometimes it is more than the primary inputs which leads to increased size of the circuit. Hence the reducing the number of circuit lines is one of the major criterion in reversible logic. The general idea is to merge the garbage output lines with appropriate constant input lines. In this work, Toffoli gate implementation of BCD adder and press gate implementation of BCD adder is taken and an optimization algorithm has been applied to reduce the number of lines in the circuit. The kit used to implement the design is Vertex5 in which both the area and delay are analyzed.

ARM Controller and EEG based Drowsiness Tracking and Controlling during Driving B. Naresh; S. Rambabu; D. Khalandar Basha
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 6, No 3: November 2017
Publisher : Institute of Advanced Engineering and Science

This paper discussed about EEG-Based Drowsiness Tracking during Distracted Driving based on Brain computer interfaces (BCI). BCIs are systems that can bypass conventional channels of communication (i.e., muscles and thoughts) to provide direct communication and control between the human brain and physical devices by translating different patterns of brain activity commands through controller device in real time. With these signals from brain in mat lab signals spectrum analyzed and estimates driver concentration and meditation conditions. If there is any nearest vehicles to this vehicle a voice alert given to driver for alert. And driver going to sleep gives voice alert for driver using voice chip. And give the information about traffic signal indication using RFID. The patterns of interaction between these neurons are represented as thoughts and emotional states. According to the human feelings, this pattern will be changing which in turn produce different electrical waves. A muscle contraction will also generate a unique electrical signal. All these electrical waves will be sensed by the brain wave sensor and it will convert the data into packets and transmit through Bluetooth medium. Level analyzer unit (LAU) is used to receive the raw data from brain wave sensor and it is used to extract and process the signal using Mat lab platform. The nearest vehicles information is information is taken through ultrasonic sensors and gives voice alert. And traffic signals condition is detected through RF technology.

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