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International Journal of Reconfigurable and Embedded Systems (IJRES)
Published by Institute of Advanced Engineering and Science
ISSN : 20894864     EISSN : 27222608     DOI : -
Core Subject : Economy,
Economics, Econometrics & Finance
The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems, ranging from audio-video-equipment, telephones, vehicles, toys, aircraft, medical diagnostics, pacemakers, climate control systems, manufacturing systems, intelligent power systems, security systems, to weapons etc. The aim of IJRES is to provide a vehicle for academics, industrial professionals, educators and policy makers working in the field to contribute and disseminate innovative and important new work on reconfigurable and embedded systems. The scope of the IJRES addresses the state of the art of all aspects of reconfigurable and embedded computing systems with emphasis on algorithms, circuits, systems, models, compilers, architectures, tools, design methodologies, test and applications.
Arjuna Subject : -
Articles 456 Documents
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Room energy management utilizing internet of things technology for decreasing electricity consumption Winasis, Winasis; Suroso, Suroso; Nugraha, Azis Wisnu Widhi; Priswanto, Priswanto
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp734-744

Abstract

This paper proposes a novel internet of things (IoT)-based control system for energy management to reduce electricity consumption from the two most dominant loads in buildings: air conditioners (AC) and lighting. The proposed system provides a comprehensive operational control strategy that integrates scheduling, human detection, ambient temperature, and light intensity for optimal room-level energy management employed. The proposed system employs wireless fidelity (WiFi)-enabled temperature, presence, and light sensors for comprehensive room conditions monitoring. Additionally, a WiFi-connected infrared module serves as an actuator to regulate the AC unit. Testing results demonstrate compelling energy savings, achieving up to 36% for the AC and 72% for the lighting while maintaining a comfortable indoor environment. These results were obtained from an experimental test in a private room within a residence over an 8-hour daytime period with 50% occupancy time. The proposed IoT system offers a highly effective and easily deployable solution for sustainable energy reduction in residential settings.
Enhancing cross-cutting concerns in the internet of things with applying aspect oriented programming Fatiha, Khalifa; Bouchiba, Guelta
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp745-753

Abstract

Aspect oriented programming (AOP) is a new programming model that provides new concepts to handle cross-cutting concerns about code. The idea of introducing AOP in the internet of things (IoT) is inherited from the complexity of sensor operations involving data acquisition, processing, and communication, the need to support multiple simultaneous services for users particularly security services such as authentication, authorization, data traceability, and transaction management, and the challenges posed by the IoT deployments, the treatment of these data volumes lead to problematic code redundancy and cross-cutting concerns that compromise system maintainability. In this context, AOP enables the separation of core functionalities, data management, and cross-cutting concerns, allowing them to be developed and reused independently within the same codebase. To address these issues, this paper proposes an AOP model for IoT systems based on the Petri net representations. The model strategically integrates the core AOP advantages of modularity, reusability, and extensibility, microservices based architectural decomposition and specialized handling of sensor-specific requirements in IoT environments.
The impacts of optical display BaF2-Ce materials on solid-state lighting Quan, Luu Hong; Loan, Nguyen Thi Phuong
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp717-724

Abstract

Transparent ceramic doped with barium fluorid cerium (BaF2-Ce) was created via a sintering method and its brightness and scintillation characteristics were examined. The luminescence is associated with the 5d-4f transitions in the Ce3+ ion and exhibits emitting maxima at 310 and 323 nm. For Na-22 radioisotopes, photo-maximum at 511 keV and 1274 keV were achieved using translucent ceramic BaF2-Ce. The translucent ceramic BaF2-Ce has been determined to have a power resolution of 13.5% at 662 keV. A luminescent production rate was measured for the BaF2-Ce (0.2%) ceramic, which is similar to sole crystal. Calculations of the scintillation degradation period beneath 662 keV gamma stimulation reveal a quick part of 58 ns and a somewhat sluggish part of 434 ns. The more gradual part in BaF2-Ce(0.2%) ceramic is linked to the dipole-dipole power transmission from the host structure to the Ce3+ luminous core and is quicker comparing to self-trapped excitons (STE) emitting in BaF2 host. BaF2-Ce offer various qualities, including significant illumination output, rapid degradation duration, and rapid scintillating reaction, which are desirable for many global fields such as medicine, radiation detection, industrial systems and nuclear safety.
Design of mobile application for communication and user interface of ESP32 potentiostat system Supriyanti, Retno; Widanarto, Wahyu; Dwi Susanto, Putra; Ardi Wicaksono, Madya; Rais Akhdan, Syafrudin; Alqaaf, Muhammad
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp725-733

Abstract

The potentiostat utilizing the ESP32 has a 12-bit analog-to-digital converter (ADC), meaning the maximum value for ADC voltage readings on the ESP32 is 4095. These ADC readings are then converted into actual voltage units, ensuring more accurate measurements on the potentiostat. To facilitate the use of the ESP32 potentiostat, a mobile application must be designed as a user interface for data communication. The application will be developed on a mobile platform using a Bluetooth low energy (BLE) communication channel for easier access. The development process will utilize visual studio code as the code editor and programming languages like Dart and Flutter. The resulting application will feature a user-friendly dashboard, display data in a cyclic voltammetry graph, and store data in comma-separated values (CSV) files or images in the phone’s memory. This stored data will simplify observing results obtained from the ESP32 potentiostat.
SPARTAN–field programmable gate array implementation for analog waveforms generation by direct digital synthesis Khatir Ahmed Nassim, Moulai; Zakarya, Ziani
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp597-604

Abstract

In the last thirty years, low power field programmable gate arrays (FPGAs) becoming more commonly used to implement a countless of applications in different electronics industry domains. Due to their flexible design, strong compatibility, parallel computing, and compared to the CPU architecture, FPGA accentuate computing efficiency and con sidered as one of the devices with the lowest application risk and the shortest development cycle among the variety of available programmable circuits families. This article details the design and implementation of a direct digital synthesis (DDS) signal generator using the Spartan-6 FPGA, focusing on high-quality sine wave generation. The system utilizes look-up tables (LUTs) and Block RAM (BRAM) for efficient storage and retrieval of sine wave data, while an 8-bit DAC0808 digital-to-analog converter (DAC) ensures precise waveform output. The FPGA's reconfigurable architecture allows real-time adjustments of frequency and phase, making the design suitable for various signal processing applications and modulation techniques like binary phase shift keying (BPSK).
Implementation of hardware security module using elliptic curve cryptography for cyber-physical system Nisha, B. Muthu; Selvakumar, J.
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp705-716

Abstract

The vision of sustainable development goal 9 (SDG 9) is realized through the integration of innovative technologies in the cyber-physical system (CPS). This work focuses on a smart network meter (SNM) application, designed to manage the extensive big data analytics required for processing and analyzing vast amounts of aggregated data in a short period. To address these demands, an advanced explicitly parallel instruction computing (AEPIC) approach is employed, leveraging a multi-core hardware security module (HSM) built on the elliptic curve cryptography (ECC) algorithm. Implementing the algorithm on various field programmable gate arrays (FPGAs) ensures adaptability to different hardware configurations, delivering scalable and optimized performance for big data aggregation in SNM applications. The proposed module showcases exceptional performance in design analysis. The Virtex-7 FPGA demonstrates excellent suitability for big data analytics in smart network applications, with dynamic power consumption accounting for 55% of total power and an on-chip power of 0.542 watts.
Classification metrics for pet adoption prediction with machine learning Islamiyah, Islamiyah; Rivani Ibrahim, Muhammad; Gunawan, Suwardi; Marisa Khairina, Dyna; Erniati, Erniati
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp638-648

Abstract

Millions of pets are temporarily placed in shelters, making it challenging for shelters to ensure pets find permanent homes. High adoption rates are crucial for animal welfare and the sustainability of shelter operations. This study aims to identify key factors influencing pet adoption and create classification metrics using five machine learning (ML) classification model approaches to predict the likelihood of pet adoption, to find the best model performance for each analysis. The dataset was obtained from several features related to animal characteristics and adoption conditions. The results of the study present classification of metric models that indicate decision tree and random forest (RF) as the most effective models with superior performance in terms of accuracy and class separation ability. Further research provides initial exploration of ML models that are not only limited to classification models but also model integration into internet of things (IoT) systems for the implementation of a pet adoption prediction system based on ML inference. The implementation of ML classification models helps improve the efficiency of animal adoption programs and optimize shelter operations, ultimately increasing the chances of successful pet adoption. The results of the study provide insights into factors influencing pet adoption, minimizing the length of stay (LOS) in shelters, and contribute to practitioners/ researchers as a reference for exploring new related factors and exploring the performance of ML models, especially classification models.
Performance analysis of REST API in a real-time IoT-based vehicle monitoring system Dwiyanto, Rizki Ananta; Mutiara, Giva Andriana; Sari, Marlindia Ike
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp766-784

Abstract

This study studies the design and implementation of a REST API and its performance analysis for an internet of things (IoT)-based vehicles monitoring system. This system incorporates brake pad sensors, a tire pressure monitoring system (TPMS) for assessing tire pressure and temperature, light detection and ranging (LIDAR) for measuring tire thickness, and radio frequency identification (RFID) for tire identification. Data is gathered using an ESP32 microcontroller and transmitted in real-time to the server via a REST API over a wireless network. The JSON Web Token (JWT) authentication mechanism is employed to ensure data security. Testing indicates that this system has an average response time of 4–11 ms, with optimal performance recorded at 3.93 ms for the RFID sensor and peak performance at 9.19 ms for the LIDAR sensor. Load testing with 100 concurrent users demonstrates that the system maintains stability with a 100% data delivery success rate. Authentication testing demonstrates that the API is accessible solely with a valid token, hence preventing unauthorized access. This study's results demonstrate that integrating REST API with IoT monitoring systems facilitates real-time vehicle monitoring, enhances maintenance efficiency, and offers viable solutions for future predictive maintenance systems.
Critical success factor blockchain technology in renewable energy: systematic literature review Inayatulloh, Inayatulloh; T., Thoyyibah
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp821-833

Abstract

In recent years, blockchain technology has garnered considerable interest in the renewable energy sector. Nonetheless, scholars have yet to investigate the comprehensive assessment of critical success factors (CSFs) for the implementation of blockchain technology in renewable energy. Furthermore, the current research lacks a stage framework or a standardized set of CSFs for blockchain technology. This review study seeks to establish a stage framework and identify a set of common CSFs for the effective adoption of blockchain technology by examining published materials pertinent to the topic under investigation. This evaluation employs a systematic literature review and scientific mapping methodology to objectively ascertain a collection of CSFs. We examined 65 journal articles from the Scopus database and Google Scholar, concentrating on prominent journals, keywords, countries/regions, and documents within the CSF domain of blockchain technology in renewable energy. The findings indicate that nations including China, Australia, the United States, and Germany have made the most significant contributions to this field. Among the 20 CSFs, the foremost five are regulation, integration with current systems, scalability, and security. The proposal delineates four principal research gaps and prospective research trajectories: environmental effect assessment, standardization, user experience and interface design, and management control. The insights and CSF checklist for blockchain technology will facilitate successful exploration and implementation in renewable energy.
Parallel graph algorithms on a RISCV-based many-core Ravikumar, Ashuthosh Moolemajalu; Vinay, Aakarsh; Nagar, Krishna K.; Purnaprajna, Madhura
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 14, No 3: November 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v14.i3.pp843-854

Abstract

Graph algorithms are essential in domains like social network analysis, web search, and bioinformatics. Their execution on modern hardware is vital due to the growing size and complexity of graphs. Traditional multi-core systems struggle with irregular memory access patterns in graph workloads. Reduced instruction set computer–five (RISC-V)-based many-core processors offer a promising alternative with their customizable open-source architecture suitable for optimization. This work focuses on parallelizing graph algorithms like breadth-first search (BFS) and PageRank (PR) on RISC-V many-core systems. We evaluated performance based on graph structure and processor architecture, and developed an analytical model to predict execution time. The model incorporates the unique characteristics of the RISC-V architecture and the types and numbers of instructions executed by multiple cores, with a maximum prediction error of 11%. Our experiments show a speedup of up to 11.55× for BFS and 7.56× for PR using 16 and 8 cores, respectively, over single-core performance. Comparisons with existing graph processing frameworks demonstrate that RISC-V systems can deliver up to 20× better energy efficiency on real-world graphs from the network repository.

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